search for: hiraditya

Displaying 11 results from an estimated 11 matches for "hiraditya".

2020 Mar 18
6
GSoC 2020 Project "Improve MegreFunctions to incorporate MergeSimilarFunctions patches and ThinLTO Support"
...ject description: http://llvm.org/OpenProjects.html#llvm_mergesim Please create an account in llvm phabricator (reviews.llvm.org) if you haven't already, and put your patches there. Let me know if you have further questions; both llvm-dev and discord are good places to reach out. My userid is: hiraditya Welcome to GSoC! Best, -Aditya
2020 Mar 21
4
questionabout loop rotation
...p invariant from the second conditional because loop rotation didn't peel all the conditionals. My observation is from a while ago so happy to be corrected. -Aditya From: Stefanos Baziotis <stefanos.baziotis at gmail.com> Sent: Saturday, March 21, 2020 1:42 PM To: Aditya K <hiraditya at msn.com>; 林政宗 <jackie_linzz at 126.com>; Johannes Doerfert <johannesdoerfert at gmail.com> Cc: llvm-dev <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] questionabout loop rotation   Hi Aditya, Glad to hear that. I want to read the patch but it's kind of big...
2019 Feb 01
6
Status of the function merging pass?
Hi Nikita, Glad to hear that Rust code can benefit a lot from this. I have put patches to enable merge-similar functions with thinLTO. https://reviews.llvm.org/D52896 etc. <https://reviews.llvm.org/D52896> This is more powerful than existing merge-functions pass and all we need to do is port these patches to trunk llvm. I'd be happy to help with this effort. -Aditya
2020 Aug 12
2
[RFC] Machine Function Splitter - Split out cold blocks from machine functions using profile data
> Just chiming in about the outliner stuff. (In general, I think it's desirable to have multiple options for how early/late a pass runs.) I'm wondering if MachineOutliner can be augmented to add MachineFunctionSplitter functionalities as well. If the analysis part of MachineOutliner can allow single basic block outlining with some cost models. Aditya Kumar Compiler Engineer
2013 Sep 12
1
[LLVMdev] %noreg in DBG_VALUE
I have a question regarding the DBG_VALUE instruction. IIUC the DBG_VALUE appears in two different forms: 1. DBG_VALUE( %Reg, %Reg, metadata) 2. DBG_VALUE(%Reg, offset, metadata) In the first version, the second operand is always a %noreg in the form of: DBG_VALUE(%Reg, %noreg, metadata). Is it possible to have a different version of DBG_VALUE that only has 2 operands which will have only
2020 Mar 23
2
questionabout loop rotation
Hi, Aditya, I took a look but I was hoping for a simpler example. And something that is more "usual". As Florian mentioned, these branches are on undefs. But thank you. Best, Stefanos Στις Δευ, 23 Μαρ 2020 στις 1:16 μ.μ., ο/η Florian Hahn < florian_hahn at apple.com> έγραψε: > > > > On Mar 21, 2020, at 23:13, Aditya K via llvm-dev < > llvm-dev at
2020 Mar 21
2
questionabout loop rotation
hi, I had an implementation of loop-rotation that peels the loop such that each conditional is executed at least once. https://reviews.llvm.org/D22630 This helps with LICM when instructions inside a conditional is loop invariant. The patch has decent number of test cases. All the requested comments were addressed at that time. I'm happy to rebase and put the patch again. -Aditya
2019 Dec 09
2
[PATCH] D70246: [InstCombine] remove identity shuffle simplification for mask with undefs
...? Thanks, Jay. On Thu, 14 Nov 2019 at 16:25, Sanjay Patel via Phabricator via llvm-commits <llvm-commits at lists.llvm.org> wrote: > > spatel created this revision. > spatel added reviewers: efriedma, regehr, aqjune, nlopes, RKSimon, lebedev.ri, liuz. > Herald added subscribers: hiraditya, mcrosier. > Herald added a project: LLVM. > > Given a shuffle that includes undef elements in an otherwise identity mask like: > > define <4 x float> @shuffle(<4 x float> %arg) { > %shuf = shufflevector <4 x float> %arg, <4 x float> undef, <4 x i3...
2020 Aug 10
2
[RFC] Machine Function Splitter - Split out cold blocks from machine functions using profile data
...ly-To: Snehasish Kumar <snehasishk at google.com> Date: Tuesday, August 4, 2020 at 5:41 PM To: llvm-dev <llvm-dev at lists.llvm.org>, David Li <davidxl at google.com>, Eric Christopher <echristo at google.com>, Sriraman Tallam <tmsriram at google.com>, aditya kumar <hiraditya at gmail.com>, "efriedma at codeaurora.org" <efriedma at codeaurora.org> Subject: [llvm-dev] [RFC] Machine Function Splitter - Split out cold blocks from machine functions using profile data Greetings, We present “Machine Function Splitter”, a codegen optimization pass which sp...
2020 Aug 05
3
[RFC] Machine Function Splitter - Split out cold blocks from machine functions using profile data
On Tue, Aug 4, 2020 at 10:51 PM aditya kumar <hiraditya at gmail.com> wrote: > Glad to hear that there is an interest in a function splitting pass. There > are advantages to splitting functions at different stages as you've already > noted. > Right -- with slightly different objectives. Machine Function Splitting Pass's main foc...
2020 Aug 05
10
[RFC] Machine Function Splitter - Split out cold blocks from machine functions using profile data
Greetings, We present “Machine Function Splitter”, a codegen optimization pass which splits functions into hot and cold parts. This pass leverages the basic block sections feature recently introduced in LLVM from the Propeller project. The pass targets functions with profile coverage, identifies cold blocks and moves them to a separate section. The linker groups all cold blocks across functions