Displaying 11 results from an estimated 11 matches for "hi2".
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2017 Dec 13
3
inefficient for loop, is there a better way?
...that leverages existing R functionality? I feel like the
hack below is pretty clunky and can be sped up on the true dataset. I
would like to run a more efficient script many times adjusting the value of
'per'.
ts <- 1:1000
examp <- data.frame(ts=ts, stage=sin(ts))
hi1 <- list()
hi2 <- list()
per <- 7
elev1 <- 0.6
elev2 <- 0.85
for(i in per:nrow(examp)){
examp_per <- examp[seq(i - (per - 1), i, by=1),]
stg_hi_cond1 <- subset(examp_per, examp_per$stage > elev1)
stg_hi_cond2 <- subset(examp_per, examp_per$stage > elev2)
hi1 <- c(hi1...
2009 Dec 01
4
[LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit
...t;getOperand(0), InL, InH);
SDValue NVBitsNode = DAG.getConstant(NVTBits, ShTy);
SDValue Amt2 = DAG.getNode(ISD::SUB, dl, ShTy, NVBitsNode, Amt);
SDValue Cmp = DAG.getSetCC(dl, TLI.getSetCCResultType(ShTy),
Amt, NVBitsNode, ISD::SETULT);
SDValue Lo1, Hi1, Lo2, Hi2;
switch (N->getOpcode()) {
default: llvm_unreachable("Unknown shift");
case ISD::SHL:
// ShAmt < NVTBits
Lo1 = DAG.getConstant(0, NVT); // Low part is zero.
Hi1 = DAG.getNode(ISD::SHL, dl, NVT, InL, Amt); // High part from Lo
part.
// ShAmt &g...
2009 Dec 01
0
[LLVMdev] Possible bug in ExpandShiftWithUnknownAmountBit
On Mon, Nov 30, 2009 at 7:22 PM, Javier Martinez <javier at jmartinez.org> wrote:
> Hello,
>
> I'm working in adding support for 64-bit integers to my target. I'm using
> LLVM to decompose the 64-bit integer operations by using 32-bit registers
> wherever possible and emulating support where not. When looking at the bit
> shift decomposition I saw what seems to be a
2010 Jun 01
1
loop
Can any one help it will be very kind, loop statements
I have this table and some more records, I want to reshape it
V1 V2 V3 V4 V5 V6 V7 V8 V9 V10
TP53 Dis1 Dis2 Dis3 Dis4 Dis5 Dis6
DCI New1 New2 New3 New4
FDI Hi2 H3 H4
GHD I1 I3 I4 I5 I6 I7 I8
I want my new table or matrix to be some thing like this
V1 V2 V3
Tp53 Dis1 Dis2
Tp53 Dis1 Dis3
Tp53 Dis1 Dis4
Tp53 Dis1 Dis5
Tp53 Dis1 Dis6
Tp53 Dis2 Dis3
Tp53 Dis2 Dis4
Tp53 Dis2 Dis5
Tp53 Dis2 Dis6
Tp53 Dis3 Dis4
Tp53 Dis3 Dis5
Tp53 Dis3 Dis6
Tp53 Dis4 Dis5
Tp53...
2013 Feb 15
1
Fitting pareto distribution / plotting observed & fitted dists
...ates based on dat1:
xmin <- 0.01715686
alpha <- 2.381581
I then simply wanted to print the observed and fitted dists in one plot,
so I ran:
library(ggplot2)
library(VGAM)
dat2 <- rpareto(length(dat1), location=xmin, shape=alpha)
hi1 <- hist(dat1, plot=FALSE, breaks="FD")
hi2 <- hist(dat2, plot=FALSE, breaks="FD")
y1 <- hi1$counts/sum(hi1$counts)
y2 <- hi2$counts/sum(hi2$counts)
x1 <- hi1$mids
x2 <- hi2$mids
qplot() + geom_line(aes(x=x1,y=y1)) + geom_line(aes(x=x2,y=y2), color="red")
y1.c <- rev(cumsum(rev(y1)))
y2.c <- rev(c...
2009 Apr 07
1
use the value of variable to quote certain elements in matrix
Hi, I want to use the value of variable to quote elements in matrix.
For example, I have a matrix like:
y1 y2m1 1 2m2 3 4
where y1,y2,m1,m2 are column and row names. I have two random character variable, say x, that could be either y1 or y2 and y that could be either m1 or m2. So can I do like Matrix[y,x] to quote elements? I've tried this
2012 Sep 03
0
[LLVMdev] branch on vector compare?
...%lo1 = shufflevector <4 x i1> %16, <4 x i1> undef, <2 x i32> <i32 0, i32 1>
%hi1 = shufflevector <4 x i1> %16, <4 x i1> undef, <2 x i32> <i32 2, i32 3>
%join = or <2 x i1> %lo1, %hi1
%lo2 = extractelement <2 x i1> %join, i32 0
%hi2 = extractelement <2 x i1> %join, i32 1
%final = or i1 %lo2, %hi2
Currently I would expect the code generators to produce something nasty for
this. Feel free to open a bugreport requesting that the code generators do
something better.
Ciao, Duncan.
>
> Or do I need to resort to cal...
2012 Sep 02
2
[LLVMdev] branch on vector compare?
Hi all, llvm newbie here.
I'm trying to branch based on a vector compare. I've found a slow way (below)
which goes through memory. Is there some idiom I'm missing so that it would use
for instance movmsk for SSE or vcmpgt & cr6 for altivec?
Or do I need to resort to calling the intrinsic directly?
Thanks,
Stephen.
%16 = fcmp ogt <4 x float> %15, %cr
%17 =
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...ue LHSLo, LHSHi, RHSLo, RHSHi;
- ExpandOp(LHS, LHSLo, LHSHi);
- ExpandOp(RHS, RHSLo, RHSHi);
- ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
-
- if (VT==MVT::ppcf128) {
- // FIXME: This generated code sucks. We want to generate
- // FCMPU crN, hi1, hi2
- // BNE crN, L:
- // FCMPU crN, lo1, lo2
- // The following can be improved, but not that much.
- Tmp1 = DAG.getSetCC(dl, TLI.getSetCCResultType(LHSHi.getValueType()),
- LHSHi, RHSHi, ISD::SETOEQ);
- Tmp2 = DAG.getSetCC(dl, TLI.getS...