Displaying 6 results from an estimated 6 matches for "hexagontargetlowering".
2012 Jun 01
3
[LLVMdev] Predicate registers/condition codes question
...setOperationAction(i, MVT::i8, Custom);
break;
// Only the following operations are legal on i8 predicates.
case ISD::AND:
case ISD::OR:
case ISD::XOR:
case ISD::SETCC:
case ISD::SIGN_EXTEND:
break;
}
}
and promote all i8 to i32 in HexagonTargetLowering::LowerOperation
> default. The latter will require a little hack though...
> I hope this helps.
Thanks again for your ideas and guidance: very much appreciated.
Sebastian
--
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
2012 Jun 03
0
[LLVMdev] Predicate registers/condition codes question
...t; // Only the following operations are legal on i8 predicates.
> case ISD::AND:
> case ISD::OR:
> case ISD::XOR:
> case ISD::SETCC:
> case ISD::SIGN_EXTEND:
> break;
> }
> }
>
> and promote all i8 to i32 in HexagonTargetLowering::LowerOperation
That's hard work! Why don't you call it with "Promote" instead of
"Custom" and let the Legalizer do the job? Does it not work?
Ivan
>
>> default. The latter will require a little hack though...
>> I hope this helps.
>
> Thanks ag...
2012 Jun 04
3
[LLVMdev] Predicate registers/condition codes question
...ns are legal on i8 predicates.
>> case ISD::AND:
>> case ISD::OR:
>> case ISD::XOR:
>> case ISD::SETCC:
>> case ISD::SIGN_EXTEND:
>> break;
>> }
>> }
>>
>> and promote all i8 to i32 in HexagonTargetLowering::LowerOperation
>
> That's hard work!
Indeed, that was my concern as well: that's why I tried to avoid using
i8 for predicates and use p8, but now I know that is a dead-end.
> Why don't you call it with "Promote" instead of
> "Custom" and let the Legali...
2012 Jun 03
2
[LLVMdev] Predicate registers/condition codes question
...egal on i8 predicates.
>> case ISD::AND:
>> case ISD::OR:
>> case ISD::XOR:
>> case ISD::SETCC:
>> case ISD::SIGN_EXTEND:
>> break;
>> }
>> }
>>
>> and promote all i8 to i32 in HexagonTargetLowering::LowerOperation
>
> That's hard work! Why don't you call it with "Promote" instead of
> "Custom" and let the Legalizer do the job? Does it not work?
>
>
> Ivan
>
>>
>>> default. The latter will require a little hack though...
>>&...
2012 Jun 01
0
[LLVMdev] Predicate registers/condition codes question
Hi Sebastian,
Le 25/05/2012 18:54, Sebastian Pop a écrit :
> On Thu, May 24, 2012 at 5:40 PM, Sebastian Pop<spop at codeaurora.org> wrote:
>> On Thu, May 24, 2012 at 5:06 PM, Hal Finkel<hfinkel at anl.gov> wrote:
>>> Sebastian,
>>>
>>> First, it might be useful to look at what is done in the PowerPC
>>> backend. PPC also has condition
2012 May 25
3
[LLVMdev] Predicate registers/condition codes question
On Thu, May 24, 2012 at 5:40 PM, Sebastian Pop <spop at codeaurora.org> wrote:
> On Thu, May 24, 2012 at 5:06 PM, Hal Finkel <hfinkel at anl.gov> wrote:
>> Sebastian,
>>
>> First, it might be useful to look at what is done in the PowerPC
>> backend. PPC also has condition registers that are larger than the
>> 1-bit conditional results, and it defines