search for: hexagonlowertomc

> > No problem. At some point the machine instructions represented by a class > "MachineInstr" are transformed into a representation using class "MCInst". > This is the MC level I'm talking about. It's the representation that the > llvm-mc uses. > > Do you mind pointing out where in the code this is happening? -- Rail Shafigulin Software

...gt; return; >> @@ -196,10 +196,45 @@ void HexagonAsmPrinter::printPredicateOperand(const MachineInstr *MI, >> /// the current output stream. >> /// >> void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) { >> - MCInst MCI; >> - >> - HexagonLowerToMC(MI, MCI, *this); >> - OutStreamer.EmitInstruction(MCI); >> + if (MI->isBundle()) { >> + std::vector<const MachineInstr*> BundleMIs; >> + >> + const MachineBasicBlock *MBB = MI->getParent(); >> + MachineBasicBlock::const_instr_iterator MII...