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https://bugzilla.netfilter.org/show_bug.cgi?id=1069 Bug ID: 1069 Summary: fix incorrect checksum on big endian platform Product: libnetfilter_queue Version: unspecified Hardware: mips OS: All Status: NEW Severity: enhancement Priority: P5 Component: libnetfilter_queue

...Thanks a lot! Rui Ueyama:     He taught me how to migrate AVR for LLD. どうもありがとう Duncan Sands:     He lead me to the GCC family via migrate DragonEgg to GCC 8.x and LLVM 7.x. Merci beaucoup Alex Bradbury:     He is my mentor, he is leading me to contribute to RISCV Target. Thanks a lot! Heiher:     He reviewed my backport patches for GCC 5.5, but we are also tracking the issue for gcc-6/7 branches and gcc-8 trunk. 非常感谢！龙芯战士们临近春节还奋战在Mozilla、Linux Kernel、GCC、Binutils，但依然抽出休息时间审核我的工作，非常感激！ 在 2018年01月13日 18:58, Leslie Zhai 写道: > Hi LLVM developers, > > Don't be quiet :)...

Hi LLVM developers, Don't be quiet :) we need your suggestions for supporting custom CCState, CCAssignFn in D41700. And also RegisterBank in D41653. because it needs to consider about how to support variable-sized register classes concept implemented in D24631. And I think you might have same question when porting to GlobalISel for your Targets, so please give us some directions, thanks

This question came about through reviewing work from Leslie Zhai on GlobalISel support for RISC-V, which also motivated me to revisit code which I've always felt was a bit clunky. Calling convention lowering in LLVM is typically handled by functions conforming to the CCAssignFn typedef: typedef bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT,