Displaying 2 results from an estimated 2 matches for "hbm2".
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2019 Apr 04
2
[RFC] NEC SX-Aurora VE backend
...we’d like to propose the integration of a new backend into LLVM: NEC
SX-Aurora TSUBASA Vector Engine (VE). We hope to get some feedback here
and at EuroLLVM about the path and proper procedure of merging.
The SX-Aurora VE is a Vector CPU on an PCI-E Accelerator card. It has
48GB memory from six HBM2 stacks, accessible with 1.2TB/s bandwidth, 8
cores with vector and scalar units, each. The cores share a last level
cache (LLC) and have 64 scalar registers and a normal scalar unit with
two levels of caches as well as 64 long vector registers (256 x 64
bits), 16 vector mask registers and a vector...
2020 Mar 26
5
Multi-Threading Compilers
> On Mar 26, 2020, at 10:55, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>
> On Thu, Mar 26, 2020 at 11:53 AM Florian Hahn <florian_hahn at apple.com> wrote:
>>> It also doesn't solve the problem of Functions themselves -- those are
>>> also GlobalValues…
>>
>> I am not sure why not. Function passes should only rely on the information at