Displaying 5 results from an estimated 5 matches for "hasvex_l".
2018 Mar 28
0
x86 instruction format which takes a single 64-bit immediate
...d with a 0xF3 rep prefix.
OpcEnc - Which encoding scheme this instruction uses. Normal, VEX, EVEX, or XOP.
VEX_WPrefix - Controls the value of the VEX.W bit in the encoder also tells the disassembler which instructions ignore VEX.W.
hasVEX_4V - Does this instruction use VEX.vvvv
hasVEX_L - Should this instruction be encoded with VEX.L=1
ignoresVEX_L - Tells the disassembler that VEX.L should be ignored
hasEVEX_K - Does this instruction use a k-register for masking
hasEVEX_Z - Is the k-register used for zero masking or merge masking.
hasEVEX_L2 - Should thi...
2018 Mar 28
4
x86 instruction format which takes a single 64-bit immediate
I am attempting to create an instruction which takes a single 64-bit
immediate. This doesn't seem like a thing that would exist already (because
who needs an instruction which just takes an immediate?) How might I
implement this easily? Perhaps I could use a format which encodes a
register, which is then unused?
Thanks for the help.
Gus
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2009 Jun 15
0
[LLVMdev] Regular Expressions
On Jun 15, 2009, at 11:33 AM, David Greene wrote:
> To reduce redundancy, developers must be able to write generic
> patterns
> like this:
>
> [(set DSTREGCLASS:$dst, // rr, rrr
> (xor (INTSRCTYPE (bitconvert (SRCTYPE SRCREGCLASS:$src1))),
> (INTSRCTYPE (bitconvert (SRCTYPE SRCREGCLASS:$src2)))))],
>
> The substitution then fills in the appropriate types,
2009 Jun 15
2
[LLVMdev] Regular Expressions
Chris Lattner wrote:
> However, I don't see any reason to base this off of strings. Instead
> of passing down "f32" as a string, why not do something like this
> pseudo code:
>
> class X86ValueType {
> RegisterClass RegClass;
> ...
> }
>
> def X86_f32 : X86ValueType {
> let RegClass = FR32;
> ... };
> def X86_i32 :
2009 Jun 17
3
[LLVMdev] Regular Expressions
...aseType)).RegClass, // Dst
[and probably some other stuff],
ipatterns,
asm
> {
let Prefix = TA;
let HasOpSize = 1;
let HasVEX = 1;
}
def V#NAME#_128rrm_Int : ...
def V#NAME#_256rrr_Int : ... {
let Prefix = TA;
let HasOpSize = 1;
let HasVEX = 1;
let HasVEX_L = 1;
}
def V#NAME#_256rrm_Int : ...
}
Ok, that's the first level and right here we have a problem. How do we figure
out the vector length ("??" in the strings)? We could pass it at the top
level:
defm BLENDPS : sse41_avx_fp_binary_vector_osta_vintrinsic_rmi_rrmi<0x0C,...