Displaying 2 results from an estimated 2 matches for "hasvex_4v".
2018 Mar 28
0
x86 instruction format which takes a single 64-bit immediate
...Prefix - Indicates the instruction should be encoded with a 0xF3 rep prefix.
OpcEnc - Which encoding scheme this instruction uses. Normal, VEX, EVEX, or XOP.
VEX_WPrefix - Controls the value of the VEX.W bit in the encoder also tells the disassembler which instructions ignore VEX.W.
hasVEX_4V - Does this instruction use VEX.vvvv
hasVEX_L - Should this instruction be encoded with VEX.L=1
ignoresVEX_L - Tells the disassembler that VEX.L should be ignored
hasEVEX_K - Does this instruction use a k-register for masking
hasEVEX_Z - Is the k-register used for zero ma...
2018 Mar 28
4
x86 instruction format which takes a single 64-bit immediate
I am attempting to create an instruction which takes a single 64-bit
immediate. This doesn't seem like a thing that would exist already (because
who needs an instruction which just takes an immediate?) How might I
implement this easily? Perhaps I could use a format which encodes a
register, which is then unused?
Thanks for the help.
Gus
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