Displaying 3 results from an estimated 3 matches for "hasvex".
2009 Jun 15
0
[LLVMdev] Regular Expressions
On Jun 15, 2009, at 11:33 AM, David Greene wrote:
> To reduce redundancy, developers must be able to write generic
> patterns
> like this:
>
> [(set DSTREGCLASS:$dst, // rr, rrr
> (xor (INTSRCTYPE (bitconvert (SRCTYPE SRCREGCLASS:$src1))),
> (INTSRCTYPE (bitconvert (SRCTYPE SRCREGCLASS:$src2)))))],
>
> The substitution then fills in the appropriate types,
2009 Jun 15
2
[LLVMdev] Regular Expressions
Chris Lattner wrote:
> However, I don't see any reason to base this off of strings. Instead
> of passing down "f32" as a string, why not do something like this
> pseudo code:
>
> class X86ValueType {
> RegisterClass RegClass;
> ...
> }
>
> def X86_f32 : X86ValueType {
> let RegClass = FR32;
> ... };
> def X86_i32 :
2009 Jun 17
3
[LLVMdev] Regular Expressions
...T,
cast<X86ValueType>(!strconcat("X86v??", BaseType)).RegClass, // Src
cast<X86ValueType>(!strconcat("X86v??", BaseType)).RegClass, // Dst
[and probably some other stuff],
ipatterns,
asm
> {
let Prefix = TA;
let HasOpSize = 1;
let HasVEX = 1;
}
def V#NAME#_128rrm_Int : ...
def V#NAME#_256rrr_Int : ... {
let Prefix = TA;
let HasOpSize = 1;
let HasVEX = 1;
let HasVEX_L = 1;
}
def V#NAME#_256rrm_Int : ...
}
Ok, that's the first level and right here we have a problem. How do we figure
out the vector len...