Displaying 5 results from an estimated 5 matches for "hasv3t".
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2012 Aug 07
0
[LLVMdev] [RFC] Hexagon insn table refactoring
...ndirect branch insn is currently defined as:
def JMPR_cdnNotPt_V3: JRInst<(outs),
(ins PredRegs:$src1, IntRegs:$src2),
"if (!$src1.new) jumpr:t $src2",
[]>,
Requires<[HasV3T]>;
Its new definition would be like this:
let Defs = [PC], isPredicated = 1 in
class V3_J2_jumprfnewpt<list<dag> P = [], string C = ""> : JRInst
<(outs),
(ins PredRegs:$Pu, IntRegs:$Rs),
"if (!$Pu.new) jumpr:t $Rs",
P, C> {
bits<2&g...
2012 Aug 17
0
[LLVMdev] Assert in LiveInterval update
...ruction being moved is a simple call:
let isCall = 1, neverHasSideEffects = 1,
Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31,
P0, P1, P2, P3, LC0, LC1, SA0, SA1, USR] in {
def CALLv3 : JInst<(outs), (ins calltarget:$dst),
"call $dst", []>, Requires<[HasV3T]>;
}
CALLv3 <ga:@printf>, %D0<imp-def,dead>, %D1<imp-def,dead>,
%D2<imp-def,dead>, %R31<imp-def>, %R0<imp-use,kill>, ...
Another clue - slot renumbering just took place:
*** Renumbered SlotIndexes 1056-2120 ***
...
*** Renumbered SlotIndexes 1068-2140 ***...
2012 Aug 15
3
[LLVMdev] MI bundle liveness attributes
On Aug 13, 2012, at 8:34 AM, Sergei Larin <slarin at codeaurora.org> wrote:
> Andy,
>
> Yes, this is what Arnold has suggested also, and from this point it looks
> like it should work, but it will require parsing the bundle every time we
> care to know whether this is a real use or a conditional def. This might
> become awkward... but I guess I should provide a better
2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
...gt;> - def JMPR_cPnewt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
>> + def JMPR_cdnPt_V3: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
>> "if ($src1.new) jumpr:t $src2",
>> []>, Requires<[HasV3T]>;
>> }
>> @@ -52,7 +53,7 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1,
>> // if (!p?.new) jumpr:t r?
>> let isReturn = 1, isTerminator = 1, isBarrier = 1,
>> Defs = [PC], Uses = [R31] in {
>> - def JMPR_cNotPnewt: JRInst<(outs), (ins Pre...
2012 Aug 28
2
[LLVMdev] Assert in LiveInterval update
...e call:
>
> let isCall = 1, neverHasSideEffects = 1,
> Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31,
> P0, P1, P2, P3, LC0, LC1, SA0, SA1, USR] in {
> def CALLv3 : JInst<(outs), (ins calltarget:$dst),
> "call $dst", []>, Requires<[HasV3T]>; }
>
> CALLv3 <ga:@printf>, %D0<imp-def,dead>, %D1<imp-def,dead>, %D2<imp-
> def,dead>, %R31<imp-def>, %R0<imp-use,kill>, ...
>
> Another clue - slot renumbering just took place:
>
> *** Renumbered SlotIndexes 1056-2120 *** ...
>...