Displaying 5 results from an estimated 5 matches for "hastype".
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has_type
2016 Sep 21
4
Creating a clang-tidy const position check
...that sound reasonable? There's also
Qualifiers::removeConst and Qualifiers::addConst, but I'm not sure how
it affects the position of const.
I have trouble with finding all const-qualified types. I looked at
misc-misplaced-const for inspiration, which contains this matcher:
valueDecl(hasType(isConstQualified()))
Why doesn't this yield a match? My test code has this form:
template <class T>
struct type {};
template <class T>
void f(const type<const double>&, const T&) {
}
using alias = const int&;
I've tested this expres...
2008 Oct 14
0
[LLVMdev] INSERT_SUBREG node.
You need to specify sub-register == super-register, idx relationship.
See X86RegisterInfo.td:
def x86_subreg_8bit : PatLeaf<(i32 1)>;
def x86_subreg_16bit : PatLeaf<(i32 2)>;
def x86_subreg_32bit : PatLeaf<(i32 3)>;
def : SubRegSet<1, [AX, CX, DX, BX, SP, BP, SI, DI,
R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W],
[AL, CL,
2008 Oct 13
2
[LLVMdev] INSERT_SUBREG node.
On Thu, 2008-10-02 at 11:19 -0700, Evan Cheng wrote:
>
> On Oct 2, 2008, at 11:02 AM, Sanjiv.Gupta at microchip.com wrote:
>
> > What’s the value produced by an INSERT_SUBREG node? Is it a chain?
>
>
> No, insert_subreg returns a value:
>
>
> v1 = insert_subreg v2, v3, idx
>
>
> v1 and v2 will have the same type, e.g. i16, and v3 must have a
>
2008 Oct 15
2
[LLVMdev] INSERT_SUBREG node.
...st TargetRegisterClass *TRC,
unsigned SubIdx, MVT VT) {
// Pick the register class of the superegister for this type
for (TargetRegisterInfo::regclass_iterator I =
TRC->superregclasses_begin(),
E = TRC->superregclasses_end(); I != E; ++I)
if ((*I)->hasType(VT) && getSubRegisterRegClass(*I, SubIdx) == TRC)
return *I;
assert(false && "Couldn't find the register class");
return 0;
}
-----------------------------------------------------------------
The getSubRegisterRegClass uses SubIdx - 1;
so INSERT_SUBRE...
2016 Apr 27
2
[Sparc] builtin setjmp / longjmp - need help to get past last problem
...unsigned PtrSize = PVT.getStoreSize();
+ assert(PVT == MVT::i32 && "Invalid Pointer Size!");
+
+ // Need to "fix-up" this value later.
+ unsigned DstReg = MI->getOperand(0).getReg();
+ const TargetRegisterClass *RC = MRI.getRegClass(DstReg);
+ assert(RC->hasType(MVT::i32) && "Invalid destination!");
+ unsigned mainDstReg = MRI.createVirtualRegister(RC);
+ unsigned restoreDstReg = MRI.createVirtualRegister(RC);
+
+ // For v = setjmp(buf), we generate
+ //
+ // thisMBB:
+ // SjLjSetup mainMBB
+ // bl mainMBB
+ // v_restor...