Displaying 3 results from an estimated 3 matches for "hassram".
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hassam
2017 May 28
2
Pseudo-instruction that overwrites its input register
...t Constraints = "@earlyclobber $reg" in
def LDWRdPtr : Pseudo<(outs DREGS:$reg),
(ins PTRREGS:$ptrreg),
"ldw\t$reg, $ptrreg",
[(set i16:$reg, (load i16:$ptrreg))]>,
Requires<[HasSRAM]>;
The problem, of course, is that with this definition I end up with code
which assumes it is equivalent to save P before 'ldw r1:r2,P' or after. I
tried adding "@earlyclobber $ptrreg" as a Constraint, but that just leads
to an assertion failure during codegen (I assume be...
2019 Mar 11
3
IsDead, IsKill
Thanks.
I saw the header comments but it wasn’t clear to me what the difference between those concepts is?
My slightly vague understanding is IsDef means that the register specified by this operand is set by the machine instruction. So I understand that to mean the MO will override that register?
Also things like early clobber, perhaps there is another document that clarifies some of these
2017 May 28
2
Pseudo-instruction that overwrites its input register
...$reg" in
>> def LDWRdPtr : Pseudo<(outs DREGS:$reg),
>> (ins PTRREGS:$ptrreg),
>> "ldw\t$reg, $ptrreg",
>> [(set i16:$reg, (load i16:$ptrreg))]>,
>> Requires<[HasSRAM]>;
>>
>> The problem, of course, is that with this definition I end up with code which assumes it is equivalent to save P before 'ldw r1:r2,P' or after. I tried adding "@earlyclobber $ptrreg" as a Constraint, but that just leads to an assertion failure during codege...