search for: hassinco

Displaying 3 results from an estimated 3 matches for "hassinco".

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2017 Oct 07
2
Bug 20871 -- is there a fix or work around?
...re not available in 32-bit. setLibcallName(RTLIB::SHL_I128, nullptr); setLibcallName(RTLIB::SRL_I128, nullptr); setLibcallName(RTLIB::SRA_I128, nullptr); + setLibcallName(RTLIB::MUL_I128, nullptr); } // Combine sin / cos into one node or libcall if possible. if (Subtarget.hasSinCos()) { setLibcallName(RTLIB::SINCOS_F32, "sincosf"); This will make the Legalizer choose the brute force approach below: void DAGTypeLegalizer::ExpandIntRes_MUL(SDNode *N, SDValue &Lo, SDValue &Hi) { ... if (LC == RTLIB::UNKNOWN_LIB...
2017 Oct 05
3
Bug 20871 -- is there a fix or work around?
Looks like I have run into the same issue reported in: https://bugs.llvm.org/show_bug.cgi?id=20871 Is there a fix or work-around for it? The bug report seems to be still open. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20171005/46c1282d/attachment.html>
2013 Oct 15
0
[LLVMdev] [llvm-commits] r192750 - Enable MI Sched for x86.
...th zero passed as the second argument. Otherwise it >> /// returns null. >> const char *getBZeroEntry() const; >> - >> + >> /// This function returns true if the target has sincos() routine in its >> /// compiler runtime or math libraries. >> bool hasSinCos() const; >> >> + /// Enable the MachineScheduler pass for all X86 subtargets. >> + bool enableMachineScheduler() const LLVM_OVERRIDE { return true; } >> + >> /// enablePostRAScheduler - run for Atom optimization. >> bool enablePostRAScheduler(CodeGenOpt::...