Displaying 6 results from an estimated 6 matches for "hasonememoperand".
2015 Jul 01
3
[LLVMdev] MIScheduler + AA: Missed scheduling opportunity in MIsNeedChainEdge. Bug?
...FI,
- const DataLayout &DL) {
+ const DataLayout &DL,
+ AliasAnalysis *AA) {
if (!MI || MI->memoperands_empty())
return true;
// We purposefully do no check for hasOneMemOperand() here
@@ -497,6 +498,7 @@ static inline bool isUnsafeMemoryObject(MachineInstr *MI,
if (!V)
return true;
+ if (!AA) {
SmallVector<Value *, 4> Objs;
getUnderlyingObjects(V, Objs, DL);
for (Value *V : Objs) {
@@ -504,6 +506,7 @@ static inline bool isUnsafeMemoryObject(...
2016 Feb 03
2
[buildSchedGraph] memory dependencies
...a/lib/CodeGen/ScheduleDAGInstrs.cpp
b/lib/CodeGen/ScheduleDAGInstrs.cpp
index 00a0b0f..cd48f51 100644
--- a/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -584,6 +584,25 @@ static bool MIsNeedChainEdge(AliasAnalysis *AA,
const MachineFrameInfo *MFI,
if (!MIa->hasOneMemOperand() || !MIb->hasOneMemOperand())
return true;
+ // If mem-operands show that the same address Value is used by both
+ // ("normal") instructions, simply check offsets and sizes of the
+ // accesses.
+ MachineMemOperand *MMOa = *MIa->memoperands_begin();
+ MachineMemOperand...
2008 Jul 16
1
[LLVMdev] atomic memoperand patch
...========================================
--- lib/Target/X86/X86ISelLowering.cpp (revision 53702)
+++ lib/Target/X86/X86ISelLowering.cpp (working copy)
@@ -6010,7 +6010,9 @@
for (int i=0; i <= lastAddrIndx; ++i)
(*MIB).addOperand(*argOpers[i]);
MIB.addReg(t2);
-
+ assert(bInstr->hasOneMemOperand() && "Unexpected number of
memoperand");
+ (*MIB).addMemOperand(*F, *bInstr->memoperands_begin());
+
MIB = BuildMI(newMBB, TII->get(X86::MOV32rr), destOper.getReg());
MIB.addReg(X86::EAX);
@@ -6107,6 +6109,8 @@
for (int i=0; i <= lastAddrIndx; ++i)
(...
2018 Nov 27
3
[RFC] Tablegen-erated GlobalISel Combine Rules
...$A), (sub_lo $B)))>;
Matching MachineMemOperands
While re-writing these examples, I also realized I didn't have any examples for testing properties of the MachineMemOperand, so here's one:
def mmo_is_load_8 : GIMatchPredicate<
(ins instr:$A), (outs), [{
if (!${A}.hasOneMemOperand())
return false;
const auto &MMO = *${A}.memoperands_begin();
return MMO.isLoad() && MMO.getSize() == 1;
}]>;
def : GICombineRule<
(defs operand:$D, operand:$A),
(match (G_LOAD $D, $A):$MI,
(mmo_is_load8 instr:$MI)),
(appl...
2018 Nov 30
2
[RFC] Tablegen-erated GlobalISel Combine Rules
...achineMemOperands_
>> While re-writing these examples, I also realized I didn't have any examples for testing properties of the MachineMemOperand, so here's one:
>> def mmo_is_load_8 : GIMatchPredicate<
>> (ins instr:$A), (outs), [{
>> if (!${A}.hasOneMemOperand())
>> return false;
>> const auto &MMO = *${A}.memoperands_begin();
>> return MMO.isLoad() && MMO.getSize() == 1;
>> }]>;
>> def : GICombineRule<
>> (defs operand:$D, operand:$A),
>> (match (G_LOAD $...
2018 Nov 12
3
[RFC] Tablegen-erated GlobalISel Combine Rules
> On Nov 10, 2018, at 03:28, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>
> Thank you for the detailed reply! There's a lot to digest :) Let me try to address most of it.
>
>
> [snip]
>>> I also think you should have 'ins' and 'outs' separately; after all, a predicate may have to do a combined check on two matched registers / operands,