Displaying 6 results from an estimated 6 matches for "hasextrasrcregallocreq".
2012 Jun 10
0
[LLVMdev] anti-dependency breaking and mask/shift dependencies
...ated
> condition-register class. I might be able to define a late-expanded
> pseudo-instruction which represents both the mfcr and the mask/shift
> operations, but then those two things would not be independently
> schedulable.
It's not exactly what you ask for, but you can set the hasExtraSrcRegAllocReq flag on the mfcr instruction. That will tell the anti-dep breaker to leave that instruction alone while still being able to break other anti-dependencies on condition code registers.
If that is not enough, you will very soon be able to inject a target-dependent pass between register allocation and...
2012 Jun 10
2
[LLVMdev] anti-dependency breaking and mask/shift dependencies
On PowerPC (at least versions which predate the mfocrf instruction),
while there are multiple independent condition registers, the only way
to move those registers into a general-purpose register is to use mfcr,
which transfers all of the (concatenated) condition registers into one
general purpose register, followed by a mask/shift operation to extract
the desired pieces.
I would like to know if
2013 May 16
2
[LLVMdev] MachineOperand Fixed Register
Is there any way to determine if a Register-type MachineOperand
represents a fixed machine register? For example, call arguments must
end up in specific machine register but I don't see any way to ascertain
this from the information in MachineOperand. Basically, I need to know
if I am allowed to rename a MachineOperand or not after register
allocation.
Thanks!
2013 May 20
0
[LLVMdev] MachineOperand Fixed Register
On May 16, 2013, at 2:23 PM, dag at cray.com wrote:
> Is there any way to determine if a Register-type MachineOperand
> represents a fixed machine register? For example, call arguments must
> end up in specific machine register but I don't see any way to ascertain
> this from the information in MachineOperand. Basically, I need to know
> if I am allowed to rename a
2012 Jun 11
2
[LLVMdev] anti-dependency breaking and mask/shift dependencies
...lass. I might be able to define a late-expanded
> > pseudo-instruction which represents both the mfcr and the mask/shift
> > operations, but then those two things would not be independently
> > schedulable.
>
> It's not exactly what you ask for, but you can set the
> hasExtraSrcRegAllocReq flag on the mfcr instruction. That will tell
> the anti-dep breaker to leave that instruction alone while still
> being able to break other anti-dependencies on condition code
> registers.
Interesting; I could set this attribute on a special form of the
comparison instruction, and that wo...
2017 Oct 26
3
RFC: Adding bit to register MachineOperands to allow post-RA register renaming
Forgive me if these questions are naive or if I'm misunderstanding
something. I'm certainly very interested in seeing the
MachineCopyPropagation patch finally land and stick.
1. Wouldn't function live-ins and reserved registers have started life as
physical registers already? For example, wouldn't a live-in be a copy from
a physical register to a virtual one allowing the flag to