Displaying 4 results from an estimated 4 matches for "hasdelayslot".
2011 Jan 08
0
[LLVMdev] Unreachable executed with fast Regalloc and Sparc backend
...ABLE executed" error. LLC
> generates code successfully with other standard register allocators
> available.
I haven't investigated the Sparc backend specifically but...
My guess is this is related to this entry in SparcInstrInfo.td:
let Uses = [O0, O1, O2, O3, O4, O5],
hasDelaySlot = 1, isCall = 1,
Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7,
D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15] in {
def CALL : InstSP<(outs), (ins calltarget:$dst),
"call $dst", []> {
bits&...
2011 Jan 07
2
[LLVMdev] Unreachable executed with fast Regalloc and Sparc backend
Hello,
When I run LLC with option "-O0 -march=sparc" on following testcase,
fast register allocator crashes with "UNREACHABLE executed" error. LLC
generates code successfully with other standard register allocators
available.
$ cat call.ll
define void @test() nounwind {
entry:
%0 = tail call i32 (...)* @foo() nounwind
tail call void (...)* @bar() nounwind
ret void
}
2015 Nov 19
2
Way to print all the properties of a given def
Does anybody know is there is a way to print all the property values for a
given def?
For example I have a following instruction definition in the .td file
let isReturn = 1, isTerminator = 1, hasDelaySlot=1, isBarrier = 1,
isCodeGenOnly = 1, Inst = 0x44004800 in {
def RET : InstBR<0x1, (outs), (ins),
"l.jr\tr9",
[(retflag)]>;
}
Ultimately when I track it down the def tracks down to class Instruction in
include/llvm/Target/Target.td, ie.
class...
2008 Apr 27
2
[LLVMdev] Questions for new Backend
...t mayStore = 0;
bit isTwoAddress = 0; // see question 1
bit isConvertibleToThreeAddress = 0; // see question 1
bit isCommutable = 0; // see rq1 below
bit isTerminator = 0; // terminate what? A BB, A function, or the
program
bit isReMaterializable = 0; // ?
bit isPredicable = 0;
bit hasDelaySlot = 0;
bit usesCustomDAGSchedInserter = 0;
bit hasCtrlDep = 0; // ?
bit isNotDuplicable = 0; // ?
bit hasSideEffects = 0;
bit mayHaveSideEffects = 0; // how is this different from has side effect?
bit neverHasSideEffects = 1;
Rq1: If I have a instruction 'add reg, imm' and don...