search for: hascmov

Displaying 4 results from an estimated 4 matches for "hascmov".

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2013 Aug 11
1
[LLVMdev] [global-isel] Simplifying the simplifier
...in linear integer arithmetic? Or can you have arbitrary calls to complex C++ code? There are too many static predicates, so it isn't feasible to enumerate all possible combinations, but we can expose their relationships to the tool as boolean expressions. For example, X86 currently has: def HasCMov : Predicate<"Subtarget->hasCMov()">; def NoCMov : Predicate<"!Subtarget->hasCMov()">; It would be simple to define: def NoCMov : Predicate<(not HasCMov)>; And the tool would be able to infer that the predicates are disjoint. Similarly:...
2013 Aug 11
0
[LLVMdev] [global-isel] Simplifying the simplifier
>>> I like the idea of sharing code between IR and MI passes through an >>> abstract interface. I think that later stages in the IR pipeline also >>> need an instruction optimizer instead of a canonicalizer. >>> >>> An alternative approach would be to describe these transformations in a >>> DSL instead of C++. >> >>>
2013 Aug 11
2
[LLVMdev] [global-isel] Simplifying the simplifier
On Aug 10, 2013, at 7:32 AM, Nuno Lopes <nunoplopes at sapo.pt> wrote: >> I like the idea of sharing code between IR and MI passes through an abstract interface. I think that later stages in the IR pipeline also need an instruction optimizer instead of a canonicalizer. >> >> An alternative approach would be to describe these transformations in a DSL instead of C++. >
2016 Mar 05
2
Enable / Disable a processor feature
..."Enable hardware multiplier">; def FeatureDiv : SubtargetFeature<"div", "HasDiv", "true", "Enable hardware divider">; def FeatureCmov : SubtargetFeature<"cmov", "HasCmov", "true", "Enable conditional move instruction">; def FeatureAddc : SubtargetFeature<"addc", "HasAddc", "true", "Enable add with carry instruction">; /...