Displaying 12 results from an estimated 12 matches for "has_bar3".
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has_arg
2014 Mar 24
1
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
...d);
> if (ret)
> return ret;
[...]
> +static int
> +nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
> + struct nouveau_oclass *oclass, void *data, u32 size,
> + struct nouveau_object **pobject)
> +{
[...]
> + /* BAR3 */
> + if (has_bar3) {
> + ret = nvc0_bar_init_vm(priv, 0, 3);
[...]
> + /* BAR1 */
> + ret = nvc0_bar_init_vm(priv, 1, 1);
> if (ret)
> return ret;
The calls to nvc0_bar_init_vm() are somewhat confusing in my opinion. It
is hard to see from the invocation what these numbers mean and therefore
di...
2014 Feb 01
0
[RFC 06/16] drm/nouveau/bar: only ioremap BAR3 if it exists
....c
index bdf5941..d713eeb 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/bar/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/bar/base.c
@@ -110,6 +110,7 @@ nouveau_bar_create_(struct nouveau_object *parent,
{
struct nouveau_device *device = nv_device(parent);
struct nouveau_bar *bar;
+ bool has_bar3 = nv_device_resource_len(device, 3) != 0;
int ret;
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "BARCTL",
@@ -118,8 +119,10 @@ nouveau_bar_create_(struct nouveau_object *parent,
if (ret)
return ret;
- bar->iomem = ioremap(nv_device_resource_start(device, 3),
-...
2014 Mar 24
0
[PATCH 03/12] drm/nouveau/bar: only ioremap BAR3 if it exists
...df594116f3f..d713eeb75b13 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/bar/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/bar/base.c
@@ -110,6 +110,7 @@ nouveau_bar_create_(struct nouveau_object *parent,
{
struct nouveau_device *device = nv_device(parent);
struct nouveau_bar *bar;
+ bool has_bar3 = nv_device_resource_len(device, 3) != 0;
int ret;
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "BARCTL",
@@ -118,8 +119,10 @@ nouveau_bar_create_(struct nouveau_object *parent,
if (ret)
return ret;
- bar->iomem = ioremap(nv_device_resource_start(device, 3),
-...
2014 Feb 04
1
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...ject *parent, struct nouveau_object *engine,
> + struct nouveau_oclass *oclass, void *data, u32 size,
> + struct nouveau_object **pobject)
> +{
> + struct nouveau_device *device = nv_device(parent);
> + struct nvc0_bar_priv *priv;
> + bool has_bar3 = nv_device_resource_len(device, 3) != 0;
> + int ret;
>
> - ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 1), 0, &vm);
> + ret = nouveau_bar_create(parent, engine, oclass, &priv);
> + *pobject = nv_object(priv);
> if (ret)...
2014 Mar 24
1
[PATCH 03/12] drm/nouveau/bar: only ioremap BAR3 if it exists
...t; --- a/drivers/gpu/drm/nouveau/core/subdev/bar/base.c
> +++ b/drivers/gpu/drm/nouveau/core/subdev/bar/base.c
> @@ -110,6 +110,7 @@ nouveau_bar_create_(struct nouveau_object *parent,
> {
> struct nouveau_device *device = nv_device(parent);
> struct nouveau_bar *bar;
> + bool has_bar3 = nv_device_resource_len(device, 3) != 0;
I don't think this variable is really necessary since you only use the
expression once anyway, but I don't feel very strongly about it, so
either way:
Reviewed-by: Thierry Reding <treding at nvidia.com>
-------------- next part -------------...
2014 Mar 24
0
[PATCH 04/12] drm/nouveau/bar/nvc0: support chips without BAR3
...- return ret;
+static int
+nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 size,
+ struct nouveau_object **pobject)
+{
+ struct nouveau_device *device = nv_device(parent);
+ struct nvc0_bar_priv *priv;
+ bool has_bar3 = nv_device_resource_len(device, 3) != 0;
+ int ret;
- ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 1), 0, &vm);
+ ret = nouveau_bar_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
if (ret)
return ret;
- atomic_inc(&vm->engref[NVDEV_SUB...
2014 Feb 01
0
[RFC 07/16] drm/nouveau/bar/nvc0: support chips without BAR3
...- return ret;
+static int
+nvc0_bar_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
+ struct nouveau_oclass *oclass, void *data, u32 size,
+ struct nouveau_object **pobject)
+{
+ struct nouveau_device *device = nv_device(parent);
+ struct nvc0_bar_priv *priv;
+ bool has_bar3 = nv_device_resource_len(device, 3) != 0;
+ int ret;
- ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 1), 0, &vm);
+ ret = nouveau_bar_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
if (ret)
return ret;
- atomic_inc(&vm->engref[NVDEV_SUB...
2014 Mar 24
27
[PATCH 00/12] drm/nouveau: support for GK20A, cont'd
Hi everyone,
Here is the second batch of patches to add GK20A support to Nouveau. This time
we are adding the actual chip support, and this series brings the driver to a
point where a slightly-tweaked Mesa successfully runs shaders and renders
triangles on GBM! Many thanks to Thierry Reding and the people on the
#nouveau IRC channel for their help without which we would not have reached
this
2014 Feb 01
28
[RFC 00/16] drm/nouveau: initial support for GK20A (Tegra K1)
Hello everyone,
GK20A is the Kepler-based GPU used in the upcoming Tegra K1 chips. The following
patches perform architectural changes to Nouveau that are necessary to support
non-PCI GPUs and add initial support for GK20A. Although the support is still
very basic and more user-space changes will be needed to make the full graphics
stack run on top of it, we were able to successfully open
2014 May 02
10
[PATCH v4 0/9] drm/nouveau: support for GK20A, cont'd
Latest patches for GK20A, taking comments received for v3 into account.
Changes since v3:
- use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions
are present on every arch and the physical address to page frame number
conversion is also consistently a shift of PAGE_SHIFT. This part will
probably be replaced by something nicer in the future anyway.
- fixed a warning on
2014 Apr 21
13
[PATCH v2 00/10] drm/nouveau: support for GK20A, cont'd
Hi everyone,
Way overdue v2 of the final patches that enable basic GK20A support. Hopefully
all the issues raised with v1 have been addressed.
Changes since v1:
- Use gk20a clock driver by Ben instead of twiddling nv04's
- Name new classes after gk20a instead of nvea
- Addressed comments about BAR initialization code factorization
- Removed non-essential code which only purpose was to avoid
2014 Apr 25
12
[PATCH v3 0/9] drm/nouveau: support for GK20A, cont'd
Changes since v2:
- Enabled software class
- Removed unneeded changes to nouveau_accel_init()
- Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with
the portable page_to_phys()/phys_to_page()
- Fixed incorrect comment/commit log talking about bytes instead of words
Hope this looks good! Once this gets merged the next set will be to use this
driver on Jetson and Venice2