search for: harzardrecogn

Displaying 5 results from an estimated 5 matches for "harzardrecogn".

[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
2013 Sep 19
2
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
.... Instruction scheduler can detect this kinds of conflict and insert other instructions to avoid pipeline bubble. I think this work only can be done after RA. If so, what's the purpose for 1). I found 1) is mandatory and 2/3) are optional. Further, at least one target enable pre-RA-sched with harzardRecognizer. Does it really work out? you can resolve data hazard using pre-RA-sched only? thanks, --lx -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130919/f107f3cc/attachment.html>
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
2013 Sep 19
0
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
...ler can > detect this kinds of conflict and insert other instructions to avoid > pipeline bubble. I think this work only can be done after RA. If so, > what's the purpose for 1). I found 1) is mandatory and 2/3) are optional. > Further, at least one target enable pre-RA-sched with harzardRecognizer. > Does it really work out? you can resolve data hazard using pre-RA-sched > only? > > thanks, > --lx > > > > > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc....
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
2013 Sep 20
2
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
...detect this kinds of conflict and insert other instructions to avoid >> pipeline bubble. I think this work only can be done after RA. If so, >> what's the purpose for 1). I found 1) is mandatory and 2/3) are optional. >> Further, at least one target enable pre-RA-sched with harzardRecognizer. >> Does it really work out? you can resolve data hazard using pre-RA-sched >> only? >> >> thanks, >> --lx >> >> >> >> >> >> >> >> _______________________________________________ >> LLVM Developers mailing list...
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
2013 Sep 20
0
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
...kinds of conflict and insert other instructions to avoid >>> pipeline bubble. I think this work only can be done after RA. If so, >>> what's the purpose for 1). I found 1) is mandatory and 2/3) are optional. >>> Further, at least one target enable pre-RA-sched with harzardRecognizer. >>> Does it really work out? you can resolve data hazard using pre-RA-sched >>> only? >>> >>> thanks, >>> --lx >>> >>> >>> >>> >>> >>> >>> >>> __________________________________...
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
2013 Sep 25
1
[LLVMdev] Does Mips resolve hazard in pre-ra-sched or post-ra-sched?
...nflict and insert other instructions to avoid >>>> pipeline bubble. I think this work only can be done after RA. If so, >>>> what's the purpose for 1). I found 1) is mandatory and 2/3) are optional. >>>> Further, at least one target enable pre-RA-sched with harzardRecognizer. >>>> Does it really work out? you can resolve data hazard using pre-RA-sched >>>> only? >>>> >>>> thanks, >>>> --lx >>>> >>>> >>>> >>>> >>>> >>>> >>>>...