search for: hardware_setup

This patch series enables the Last Branch Recording feature for the guest. Instead of trapping each LBR stack MSR access, the MSRs are passthroughed to the guest. Those MSRs are switched (i.e. load and saved) on VMExit and VMEntry. Test: Try "perf record -b ./test_program" on guest. Wei Wang (4): KVM/vmx: re-write the msr auto switch feature KVM/vmx: auto switch

This patch series enables the Last Branch Recording feature for the guest. Instead of trapping each LBR stack MSR access, the MSRs are passthroughed to the guest. Those MSRs are switched (i.e. load and saved) on VMExit and VMEntry. Test: Try "perf record -b ./test_program" on guest. Wei Wang (4): KVM/vmx: re-write the msr auto switch feature KVM/vmx: auto switch

...= 0; i < lbr_stack.lbr_nr; i++) { + vmx_disable_intercept_for_msr(lbr_stack.lbr_from + i, false); + vmx_disable_intercept_for_msr(lbr_stack.lbr_to + i, false); + if (lbr_stack.lbr_info) + vmx_disable_intercept_for_msr(lbr_stack.lbr_info + i, + false); + } +} + static __init int hardware_setup(void) { int r = -ENOMEM, i, msr; @@ -6822,6 +6869,9 @@ static __init int hardware_setup(void) vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false); vmx_disable_intercept_for_msr(MSR_IA32_DEBUGCTLMSR, false); + if (enable_lbrv) + vmx_passthrough_lbr_msrs(); + memcpy(vmx_msr_bitmap...

...+8144,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .gpt_translation_fault = vmx_gpt_translation_fault, .control_singlestep = vmx_control_singlestep, .get_vmfunc_status = vmx_get_vmfunc_status, + .get_eptp_switching_status = vmx_get_eptp_switching_status, }; static __init int hardware_setup(void) @@ -8178,6 +8184,8 @@ static __init int hardware_setup(void) !cpu_has_vmx_invept_global()) enable_ept = 0; + kvm_eptp_switching_supported = cpu_has_vmx_eptp_switching(); + if (!cpu_has_vmx_ept_ad_bits() || !enable_ept) enable_ept_ad_bits = 0; diff --git a/arch/x86/kvm/x86.c...

...vmx_disable_intercept_for_msr(lbr_stack.lbr_from + i, false); > + vmx_disable_intercept_for_msr(lbr_stack.lbr_to + i, false); > + if (lbr_stack.lbr_info) > + vmx_disable_intercept_for_msr(lbr_stack.lbr_info + i, > + false); > + } > +} > + > static __init int hardware_setup(void) > { > int r = -ENOMEM, i, msr; > @@ -6822,6 +6869,9 @@ static __init int hardware_setup(void) > vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false); > vmx_disable_intercept_for_msr(MSR_IA32_DEBUGCTLMSR, false); > > + if (enable_lbrv) > + vmx_passthrou...

...vmx_disable_intercept_for_msr(lbr_stack.lbr_from + i, false); > + vmx_disable_intercept_for_msr(lbr_stack.lbr_to + i, false); > + if (lbr_stack.lbr_info) > + vmx_disable_intercept_for_msr(lbr_stack.lbr_info + i, > + false); > + } > +} > + > static __init int hardware_setup(void) > { > int r = -ENOMEM, i, msr; > @@ -6822,6 +6869,9 @@ static __init int hardware_setup(void) > vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false); > vmx_disable_intercept_for_msr(MSR_IA32_DEBUGCTLMSR, false); > > + if (enable_lbrv) > + vmx_passthrou...

...0); vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest)); + add_atomic_switch_msr(vmx, MSR_IA32_DEBUGCTLMSR, 0, 0); + if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat); @@ -6821,6 +6820,7 @@ static __init int hardware_setup(void) vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false); vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false); vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false); + vmx_disable_intercept_for_msr(MSR_IA32_DEBUGCTLMSR, false); memcpy(vmx_msr_bitmap_legacy_x2apic_api...

...tdefender.com> --- arch/x86/kvm/vmx/vmx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index dc648ba47df3..152c58b63f69 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -7718,7 +7718,7 @@ static __init int hardware_setup(void) !cpu_has_vmx_invept_global()) enable_ept = 0; - if (!cpu_has_vmx_ept_ad_bits() || !enable_ept) + if (!cpu_has_vmx_ept_ad_bits() || !enable_ept || kvmi_is_present()) enable_ept_ad_bits = 0; if (!cpu_has_vmx_unrestricted_guest() || !enable_ept)

...ardware_unsetup = hardware_unsetup, @@ -8063,6 +8073,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .fault_gla = vmx_fault_gla, .spt_fault = vmx_spt_fault, .gpt_translation_fault = vmx_gpt_translation_fault, + .control_singlestep = vmx_control_singlestep, }; static __init int hardware_setup(void)

...ct kvm_x86_ops vmx_x86_ops __initdata = { .hardware_unsetup = hardware_unsetup, @@ -8055,6 +8062,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .fault_gla = vmx_fault_gla, .spt_fault = vmx_spt_fault, + .gpt_translation_fault = vmx_gpt_translation_fault, }; static __init int hardware_setup(void)

...= hardware_unsetup, @@ -8133,6 +8138,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .spt_fault = vmx_spt_fault, .gpt_translation_fault = vmx_gpt_translation_fault, .control_singlestep = vmx_control_singlestep, + .get_vmfunc_status = vmx_get_vmfunc_status, }; static __init int hardware_setup(void)

...@@ -8038,6 +8045,8 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { .need_emulation_on_page_fault = vmx_need_emulation_on_page_fault, .apic_init_signal_blocked = vmx_apic_init_signal_blocked, .migrate_timers = vmx_migrate_timers, + + .fault_gla = vmx_fault_gla, }; static __init int hardware_setup(void)

...and VMEntry MSR auto switch list. + */ + rdmsrl(MSR_IA32_VMX_MISC, vmx_msr); + n = ((vmx_msr & 0xe000000) >> 25) + 1; + msr_autoload_count_max = n * KVM_VMX_DEFAULT_MSR_AUTO_LOAD_COUNT; +} + /* * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR. */ @@ -6837,6 +6857,7 @@ static __init int hardware_setup(void) kvm_disable_tdp(); update_ple_window_actual_max(); + update_msr_autoload_count_max(); /* * Only enable PML when hardware supports PML feature, and both EPT @@ -9248,6 +9269,19 @@ static void vmx_arm_hv_timer(struct kvm_vcpu *vcpu) vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, delta...

This patch series is based on the VM introspection patches (https://lore.kernel.org/kvm/20200721210922.7646-1-alazar at bitdefender.com/), extending the introspection API with EPT Views and Virtualization Exceptions (#VE) support. The purpose of this series is to get an initial feedback and to see if we are on the right track, especially because the changes made to add the EPT views are not small

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place

The KVM introspection subsystem provides a facility for applications running on the host or in a separate VM, to control the execution of other VM-s (pause, resume, shutdown), query the state of the vCPUs (GPRs, MSRs etc.), alter the page access bits in the shadow page tables (only for the hardware backed ones, eg. Intel's EPT) and receive notifications when events of interest have taken place