search for: hard_regno_mode_ok

Displaying 5 results from an estimated 5 matches for "hard_regno_mode_ok".

2010 Nov 27
3
[LLVMdev] Register Pairing
...use movw wouldnt be emitted. Also these reg pairs would be stored in a pseudo reg class so the 16 bit intrs would be emitted, otherwise none of them would be produced. Going back to my case I want to favor storing 16bit or wider data in adjacent regs to favor the insertion of this instruction like HARD_REGNO_MODE_OK in gcc. To overcome this problem and to select 16bit instructions automatically by LLVM i thought on working always with 16 bit register pairs. I created a pseudo reg class that contains the reg pairs marking each pair with its 2 subregs of 8 bits. Then i marked the i16 type legal with addRegisterC...
2010 Nov 29
0
[LLVMdev] Register Pairing
On Nov 27, 2010, at 8:56 AM, Borja Ferrer wrote: > Some background first: this issue is for a backend for an 8bit microcontroller with only 8bit regs, however it has a few 16bit instructions that only work with fixed register pairs, so it doesnt allow all combinations of regs. This introduces some problems because if data wider than 8bits is expanded into 8bit operations the 16bit instructions
2010 Dec 30
0
[LLVMdev] Original data type after DAG legalization
Hello everybody, During the past week I've kept looking for a solution to this but i couldn't find one, is there really a way to get this type of information or some workaround? Thanks. 2010/12/22 Borja Ferrer <borja.ferav at gmail.com> > Hello, > > Is there a way to determine before register allocation if a virtual reg is > mapped to the lo or hi part of a piece of a
2010 Dec 22
3
[LLVMdev] Original data type after DAG legalization
Hello, Is there a way to determine before register allocation if a virtual reg is mapped to the lo or hi part of a piece of a value? Basically i need to tell the register allocator to use a certain set of registers for the lo part and others for the hi part, so in order to do this i would have to know if the data value was expanded into smaller pieces and which piece is each one. Additionally,
2010 Dec 01
2
[LLVMdev] Register Pairing
...the second case regs arent contiguous. To store data wider than 16 bits, for example for a 32 bit int we would use 2 register pairs (4 8bit regs) but here the pairs dont need to be contiguous so storing it r25:r24:r19:r18 is completely fine. As i said in my previous email this is achieved by using HARD_REGNO_MODE_OK in gcc. - Second, assuming the previous point works so the register constraints are done, how would i then proceed and combine two 8 bit instructions into a 16 bit one as Jeff pointed out in his email? For example i want to combine a 16 bit add like this: // b = b + 1: (b stored in r25:r24) add r2...