search for: handlemergeinputchains

hi Tim,guys, it was regarding splitting 16-bit ADDC to two 8-bit ADDC+ADDE. the 8-bit ADDE instruction is defined as: let Constraints="$dst=$op0",mayStore=1, hasSideEffects=0,neverHasSideEffects=1 in def ADDErm: myInstr <0x0, (outs Intregs:$dst) (ins Intregs:$op0,MEMi:$op1), "", [set IntRegs:$dest (adde IntRegs:$op0, (load ADDRi:$op1))] > very unlucky, this

On Aug 14, 2012, at 2:05 PM, Steve Montgomery <stephen.montgomery3 at btinternet.com> wrote: > Further to my earlier question, I'm perhaps a bit confused about memory serialisation. The following example, compiled using clang for the MSP430: > > target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" > target triple = "msp430-??-??" >

> No, a chain is supposed to mean "later than". It sounds like MSP430 is bending > the rules here. The instruction selector for ADD16mm is autogenerated, so, this is not MSP430 bug alone :) This is just the single target in the tree which has mem-mem instructions. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University

...nt. > > I don't suppose you could post the output of "-view-isel-dags" & > "-view-sched-dags"? I've got some ideas on how to reproduce what > you're seeing, but I need the exact DAGs to have much chance. > > It sounds like it *might* be a bug in HandleMergeInputChains, if it > doesn't take glue into account somehow. > > Cheers. > > Tim. > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140428/74c9713c/attachment.html>