search for: handleliveinregist

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2007 Apr 03
2
[LLVMdev] Live intervals and aliasing registers problem
.... > If it is marked kill, then you need to walk LiveVariables.cpp to > find out why. Here is the beginning of the BB dump. entry (0x8503c80, LLVM BB @0x8501af0, ID#0): Live Ins: %R0 %R1 %reg1024 = ORI %R0<kill>, 0 %reg1025 = ORI %R1<kill>, 0 V4R0 is getting killed because handleLiveInRegister() is called on all results of getAliasSet() for each of the liveins (this is in LiveIntervals::computeIntervals() ). handleRegisterDef() does a similar thing where calls handlePhysicalRegisterDef() on all members of getAliasSet() returned for the def, which also triggers this problem. I...
2007 Apr 04
0
[LLVMdev] Live intervals and aliasing registers problem
...to walk LiveVariables.cpp to >> find out why. > > Here is the beginning of the BB dump. > > entry (0x8503c80, LLVM BB @0x8501af0, ID#0): > Live Ins: %R0 %R1 > %reg1024 = ORI %R0<kill>, 0 > %reg1025 = ORI %R1<kill>, 0 > > V4R0 is getting killed because handleLiveInRegister() is called on > all results of getAliasSet() for each of the liveins (this is in > LiveIntervals::computeIntervals() ). > > handleRegisterDef() does a similar thing where calls > handlePhysicalRegisterDef() on all members of getAliasSet() returned > for the def, which also trig...
2007 Mar 27
0
[LLVMdev] Live intervals and aliasing registers problem
On Mar 25, 2007, at 7:12 AM, Christopher Lamb wrote: > While beginning to add vector registers to a back end I came across > the following problem: as soon as I define two sets of registers > that have a many-to-one mapping the live interval pass appears to > double-kill the mapped-onto register. I have the following excerpts > from my RegisterInfo.td. > > def V4R0
2007 Mar 25
2
[LLVMdev] Live intervals and aliasing registers problem
While beginning to add vector registers to a back end I came across the following problem: as soon as I define two sets of registers that have a many-to-one mapping the live interval pass appears to double- kill the mapped-onto register. I have the following excerpts from my RegisterInfo.td. def V4R0 : R4v<0 , "V4R0 ", []>, DwarfRegNum<0>; def R0 : Rg<0 ,