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Hi Arsen, we are beyond what I understand about how metadata operates. Maybe Adrian or David knows. --paulr From: Arsen Hakobyan [mailto:hakobyan.ars at gmail.com] Sent: Friday, January 12, 2018 12:16 PM To: Robinson, Paul Cc: llvm-dev at lists.llvm.org; David Blaikie Subject: Re: [llvm-dev] StripDeadDebugInfo for static inline functions. Just one update: the function causing the segmentation fault is the following: 359...

...t the compiler to find the commit(s) that fix this and consider backporting them locally. If not, you should file a bug on bugs.llvm.org <http://bugs.llvm.org/> and attach the source and commands you’re running. I’d be happy to take a look at it. Jonas > On 14 Jan 2018, at 16:33, Arsen Hakobyan via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > Thanks Paul, > Hi Adrian and David I would really appreciate any comments, thoughts assumptions. > > If additional information is needed please let me know. > > Regards, > Arsen > > On Sat, Jan 13, 2018 at...

...is needed please let me know. Regards, Arsen On Sat, Jan 13, 2018 at 2:54 AM, Robinson, Paul <paul.robinson at sony.com> wrote: > Hi Arsen, we are beyond what I understand about how metadata operates. > Maybe Adrian or David knows. > > --paulr > > > > *From:* Arsen Hakobyan [mailto:hakobyan.ars at gmail.com] > *Sent:* Friday, January 12, 2018 12:16 PM > *To:* Robinson, Paul > *Cc:* llvm-dev at lists.llvm.org; David Blaikie > *Subject:* Re: [llvm-dev] StripDeadDebugInfo for static inline functions. > > > > Just one update: > > > > th...

...t;SPMap.lookup(Scope->getScopeNode());" returns null. If the transformation does right things then probably there is other issue and SPMap[SP] for inlined function should find the main CompileUnit anyway. What do you think about this? Regards, Arsen On Sat, Jan 13, 2018 at 12:11 AM, Arsen Hakobyan <hakobyan.ars at gmail.com> wrote: > Hi Paul, > > Thanks for your response. > Let me actually post more details visualizing my case. Assuming that can > help. > > so the IR before the opt tool is running is: > > ; Function Attrs: nounwind > > define i16 @main...

...l to constructAbstractSubprogramScopeDIE). That > suggests that the DISubprogram for the inlined function ought to remain, > and its scope should be the DICompileUnit. > > --paulr > > > > *From:* llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] *On Behalf Of *Arsen > Hakobyan via llvm-dev > *Sent:* Friday, January 12, 2018 1:57 AM > *To:* llvm-dev at lists.llvm.org > *Subject:* [llvm-dev] StripDeadDebugInfo for static inline functions. > > > > Hi all, > > > > I would like to understand the strip-dead-debug-info transformation. > >...

Dear Tom, What is the advantage to use the “pseudo instruction” approach VS “custom lowering/DAGtoDAGSelection” VS “ Library function”? Best Kevin On Aug 14, 2014, at 9:27 AM, Tom Stellard <tom at stellard.net> wrote: > On Thu, Aug 14, 2014 at 12:05:33AM -0700, Arsen Hakobyan wrote: >> Hi all, >> >> I would like to be sure that Tablegen still does not support completely >> separate multiple instruction generation, and the only way is to write >> costume code (may be in TargetISelDAGToDAG class) to get the needed result. >> >>...

Hi all, I would like to be sure that Tablegen still does not support completely separate multiple instruction generation, and the only way is to write costume code (may be in TargetISelDAGToDAG class) to get the needed result. Dear Tom, do you found other solution (using Tablegen tool) for this? Thanks, Arsen -- View this message in context:

On Mon, Jun 30, 2014 at 02:40:43AM -0700, Quentin Colombet wrote: > Hi Arsen, > > > > On Jun 19, 2014, at 10:43 PM, Arsen Hakobyan <artinetstudio at gmail.com> wrote: > > > > Hi all, > > > > I want to generate an assembly instruction for my target using target > > description representation of the instruction. The problem is that I want to > > add direct register to be chose as an ou...

Hi all, I want to generate an assembly instruction for my target using target description representation of the instruction. The problem is that I want to add direct register to be chose as an output register for my target. Does it possible to do with an instruction definition in TARGETInstrInfo.td file? May be someone could help with an example? Currently I have seen that we can pass the name

...e caller (which is why you're seeing the call to constructAbstractSubprogramScopeDIE). That suggests that the DISubprogram for the inlined function ought to remain, and its scope should be the DICompileUnit. --paulr From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Arsen Hakobyan via llvm-dev Sent: Friday, January 12, 2018 1:57 AM To: llvm-dev at lists.llvm.org Subject: [llvm-dev] StripDeadDebugInfo for static inline functions. Hi all, I would like to understand the strip-dead-debug-info transformation. In my test case there is a static inline function with two local vari...

Hi all, I have the following test case: #define FLT_EPSILON 1.19209290E-7 int err = -1; int main() { float a = 8.1; if (((a - 8.1) >= FLT_EPSILON) || ((a - 8.1) <= -FLT_EPSILON)) { //I am using FLT_EPSILON to check whether (a != 2.0). err = 1; } else { err = 0; } return 0; } with -O3 optimization level clang generates already incorrect LLVM IR: ; Function Attrs:

Hi all, I would like to understand the strip-dead-debug-info transformation. In my test case there is a static inline function with two local variables. It appears that the function is already inlined before strip-dead-debug-info starts its work. As a result the DICompileUnit is cleaned and its subprograms list has no reference to the DISubprogram for the inlined function, but as there is

Hello, I have a need to change the parameter type of llvm.lifetime.start/end intrinsic functions to get other defined type, but i do not want to replace the current definition of the intrinsic function with the new definition. Is there a way, to do such things for a specific target? If the only way to do this is to create a separate file for my target and write there a target specific

Arsen Hakobyan wrote: > Hello, > > I have a need to change the parameter type of llvm.lifetime.start/end > intrinsic functions to get other defined type, but i do not want to replace > the current definition of the intrinsic function with the new definition. Is > there a way, to do such things f...

The sign information for binary operators is available in the llvm IR by the 'nsw' (no signed wrap) flag. Seems there is no use of this flag in the code generation phase. The sign information is no more available in the selection DAG. So how can I generate different instructions for binary operators with signed/unsigned operands in the assembler (e.g. mul/mulu)? -- View this message in

Dear all. I have a problem with the following situation: I want to handle an intrinsic function in a specific way. The prototype of my function is: "/int my_intrinsic_name()/" So I want to generate a move instruction which should use two register type operands: "/mov R1, R2/" For this purpose I assume that the instruction definition in the TargetInstrInfo.td file

Hi Arsen, On Oct 9, 2013, at 4:53 AM, Arsen Hakobyan <artinetstudio at gmail.com> wrote: > Hi all, > > I have the following test case: > #define FLT_EPSILON 1.19209290E-7 > > int err = -1; > int main() > { > float a = 8.1; > if (((a - 8.1) >= FLT_EPSILON) || ((a - 8.1) <= -FLT_EPSILON)) { //I am >...

Hello Alexandra, I have the same problem what you tell here related to the loop condition(s). You have wrote this article 3 years ago and I just want to know how do you resolve this problem. I am also thinking to keep all BBs representing a condition in a separate vector as it is done with the body's BBs (sure they will not be kept in body's list). Could you please tell your solution?

Hi all, I have found that in LLVM Front-End there are a lot of codes containing a hard-coded i8 type generation (with using of the function llvm::Type::getInt8Tyand()) and a lot of computations (basically in LLVM passes) which consider that the char size provided by the target is an 8 bit. So if I want to add a support for a target which considers 16 bit for characters I have to change all this

Hi everyone, How would you pass a string container from TargetISelLowering phase to the TargetInstPrinter phase? May be I have missed something essential, but currently seems they don't have shared class or something like that, and currently I am thinkin to initialize container in TargetTargetMachine, then pass it to the TargetInstPrinter using TargetMCAsmInfo class or something like this. I