Displaying 13 results from an estimated 13 matches for "hadtailcall".
2011 Jun 24
2
[LLVMdev] Infinite loop in llc on ARMv7 (LLVM HEAD from June 17)
...tionDAG/DAGCombiner.cpp:7732
#10 0x00acd9c0 in llvm::SelectionDAGISel::CodeGenAndEmitDAG (this=0x1be9f40)
at
/export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:559
#11 0x00acc9a0 in llvm::SelectionDAGISel::SelectBasicBlock
(this=0x1be9f40, Begin=..., End=...,
HadTailCall=@0x7ee91158)
at
/export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:414
#12 0x00acf420 in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0x1be9f40, Fn=...)
at
/export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:972
#13 0x00acbee...
2013 Dec 17
3
[LLVMdev] Trying to use patchpoint in MCJIT
...ectionDAGBuilder.cpp:5870
frame #8: 0x00000001008fc9ea
libjvm.dylib`llvm::SelectionDAGBuilder::visit(this=0x0000000106ff4d20,
I=0x0000000106fea460) + 74 at SelectionDAGBuilder.cpp:971
frame #9: 0x0000000100947e98
libjvm.dylib`llvm::SelectionDAGISel::SelectBasicBlock(this=0x0000000106ff40d0,
HadTailCall=0x00007fff5fbfe31e) + 40 at SelectionDAGISel.cpp:579
frame #10: 0x0000000100947aee
libjvm.dylib`llvm::SelectionDAGISel::SelectAllBasicBlocks(this=0x0000000106ff40d0,
Fn=0x0000000106fe7020) + 8174 at SelectionDAGISel.cpp:1192
frame #11: 0x0000000100944b94
libjvm.dylib`llvm::SelectionDAGISel:...
2013 Dec 18
0
[LLVMdev] Trying to use patchpoint in MCJIT
...t; frame #8: 0x00000001008fc9ea
> libjvm.dylib`llvm::SelectionDAGBuilder::visit(this=0x0000000106ff4d20,
> I=0x0000000106fea460) + 74 at SelectionDAGBuilder.cpp:971
> frame #9: 0x0000000100947e98
> libjvm.dylib`llvm::SelectionDAGISel::SelectBasicBlock(this=0x0000000106ff40d0,
> HadTailCall=0x00007fff5fbfe31e) + 40 at SelectionDAGISel.cpp:579
> frame #10: 0x0000000100947aee
> libjvm.dylib`llvm::SelectionDAGISel::SelectAllBasicBlocks(this=0x0000000106ff40d0,
> Fn=0x0000000106fe7020) + 8174 at SelectionDAGISel.cpp:1192
> frame #11: 0x0000000100944b94
> libjvm.dylib`...
2011 Jun 24
0
[LLVMdev] Infinite loop in llc on ARMv7 (LLVM HEAD from June 17)
...32
> #10 0x00acd9c0 in llvm::SelectionDAGISel::CodeGenAndEmitDAG (this=0x1be9f40)
> at
> /export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:559
> #11 0x00acc9a0 in llvm::SelectionDAGISel::SelectBasicBlock
> (this=0x1be9f40, Begin=..., End=...,
> HadTailCall=@0x7ee91158)
> at
> /export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:414
> #12 0x00acf420 in llvm::SelectionDAGISel::SelectAllBasicBlocks
> (this=0x1be9f40, Fn=...)
> at
> /export/home/karel/vcs/llvm-head/lib/CodeGen/SelectionDAG/SelectionDAGI...
2012 Jun 27
2
[LLVMdev] [NVPTX] Backend failure in LegalizeDAG due to unimplemented expand in target lowering
...onDAG/LegalizeDAG.cpp:3689
#6 0x00007ffff6fb3862 in llvm::SelectionDAGISel::CodeGenAndEmitDAG
(this=0x697230) at
/home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:632
#7 0x00007ffff6fb2a84 in llvm::SelectionDAGISel::SelectBasicBlock
(this=0x697230, Begin=..., End=..., HadTailCall=@0x7fffffffd880)
at /home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:499
#8 0x00007ffff6fb5792 in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0x697230, Fn=...) at
/home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1160
#9 0x0000...
2013 Dec 18
2
[LLVMdev] Trying to use patchpoint in MCJIT
...frame #8: 0x00000001008fc9ea
> libjvm.dylib`llvm::SelectionDAGBuilder::visit(this=0x0000000106ff4d20,
> I=0x0000000106fea460) + 74 at SelectionDAGBuilder.cpp:971
> frame #9: 0x0000000100947e98
>
> libjvm.dylib`llvm::SelectionDAGISel::SelectBasicBlock(this=0x0000000106ff40d0,
> HadTailCall=0x00007fff5fbfe31e) + 40 at SelectionDAGISel.cpp:579
> frame #10: 0x0000000100947aee
>
> libjvm.dylib`llvm::SelectionDAGISel::SelectAllBasicBlocks(this=0x0000000106ff40d0,
> Fn=0x0000000106fe7020) + 8174 at SelectionDAGISel.cpp:1192
> frame #11: 0x0000000100944b94
>
> lib...
2012 Jun 29
0
[LLVMdev] [NVPTX] Backend failure in LegalizeDAG due to unimplemented expand in target lowering
...9
> #6 0x00007ffff6fb3862 in llvm::SelectionDAGISel::CodeGenAndEmitDAG
> (this=0x697230) at
> /home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:632
> #7 0x00007ffff6fb2a84 in llvm::SelectionDAGISel::SelectBasicBlock
> (this=0x697230, Begin=..., End=..., HadTailCall=@0x7fffffffd880)
> at /home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:499
> #8 0x00007ffff6fb5792 in llvm::SelectionDAGISel::SelectAllBasicBlocks
> (this=0x697230, Fn=...) at
> /home/dmikushin/sandbox/src/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel....
2011 Jun 06
0
[LLVMdev] Understanding SelectionDAG construction
Hi Ankur,
> The flags "-view-sched-dags".. described in the doc doesn't seem to work. (
> "llc -help" doesn't list it ).
as far as I remember, displaying DAGs during compilation is only enabled
in "debug builds" [1] of LLVM. You probably have to re-configure and
re-compile LLVM to enable this feature.
Best regards,
Christoph
[1]
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On Aug 27, 2010, at 11:53 AMPDT, Yuri wrote:
> On 08/27/2010 11:32, Yuri wrote:
>> As I understand only one of TCRETURNri64 and RET should be created.
>> I have sources of rev.112200.
>>
>> Here is the stack when TCRETURNri64 instruction is created:
>> #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr
>> (this=0x30eb000, TID=@0x803a78940,
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...const
llvm::Instruction&>> = {<No data fields>}, NodePtr = 0x4530ed0},
End={<std::iterator<std::bidirectional_iterator_tag, const
llvm::Instruction, long int, const llvm::Instruction*, const
llvm::Instruction&>> = {<No data fields>}, NodePtr = 0x493f240},
HadTailCall=@0x7fffffff853f) at
/tmp/llvm-svn/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:364
#8 0x0000000803276048 in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0x45174d0, Fn=@0x4530bd0) at
/tmp/llvm-svn/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:744
#9 0x00000008032737f7 in llvm::...
2011 Jun 06
4
[LLVMdev] Understanding SelectionDAG construction
I am trying to understand the SelectionDAG construction from LLVM IR. I have
gone through the doc "The LLVM Target-Independent Code Generator" on LLVM
site. This gives a great initial overview. However I am unable to catch the
actual control flow for the llvm->selectionDag conversion.
The flags "-view-sched-dags".. described in the doc doesn't seem to work. (
"llc
2011 Jun 16
3
[LLVMdev] ARM support status (GHC/ARM new calling convention)
...llvm::Instruction&>> = {<No data fields>}, NodePtr = 0x92b41ac}, End=
{<std::iterator<std::bidirectional_iterator_tag,const
llvm::Instruction,ptrdiff_t,const llvm::Instruction*,const
llvm::Instruction&>> = {<No data fields>}, NodePtr = 0x92af688},
HadTailCall=@0x8046c7b) at SelectionDAGISel.cpp:432
#13 0x08b0442e in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0x92bdb50, Fn=@0x92b3f50)
at SelectionDAGISel.cpp:981
#14 0x08b01f7c in llvm::SelectionDAGISel::runOnMachineFunction
(this=0x92bdb50, mf=@0x92ce000)
at SelectionDAGISel.cpp:307
#...
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On 08/27/2010 11:32, Yuri wrote:
> As I understand only one of TCRETURNri64 and RET should be created.
> I have sources of rev.112200.
>
> Here is the stack when TCRETURNri64 instruction is created:
> #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr
> (this=0x30eb000, TID=@0x803a78940, DL={LineCol = 0, ScopeIdx = 0},
> NoImp=false) at