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2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
On Thu, Jun 13, 2013 at 10:52 AM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > I mean something like a target-specific fence machine instruction which > forces ordering of all loads/stores. I want to clarify the meaning of > “noalias” in this case. Is the fence machine instruction considered > “touching” all memory...
2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
On Wed, Jun 12, 2013 at 7:28 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > So fence only forces ordering of atomic instructions.**** > > ** ** > > Let me change my question then.**** > > ** ** > > If I have a target-specific intrinsic which forces ordering of ordinary > load/store instructions....
2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
On Wed, Jun 12, 2013 at 6:17 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > Hi, > > I have the following test case: > > define void @foo(<2 x float>* noalias nocapture %out, <2 x float>* > noalias nocapture %data0) nounwind { > entry: > %val1 = load <2 x float>* %data0, align 8 &gt...
2013 Jul 29
2
[LLVMdev] creating SCEV taking too long
On Mon, Jul 29, 2013 at 4:08 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > Hi,**** > > ** ** > > We have a benchmark where there are 128 MAD computations in a loop. (See > the attached IR.) Creating SCEVs for these expressions takes a long time, > making the compile time too long. E.g., running opt wi...
2013 Jun 13
0
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
...I want to clarify the meaning of "noalias" in this case. Is the fence machine instruction considered "touching" all memory and thus breaks the "noalias" contract? Xiaoyi From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Wednesday, June 12, 2013 8:08 PM To: Guo, Xiaoyi Cc: LLVM Dev Subject: Re: [LLVMdev] A question w.r.t fence instruction vs. noalias pointer On Wed, Jun 12, 2013 at 7:28 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com<mailto:Xiaoyi.Guo at amd.com>> wrote: So fence only forces ordering of atomic instructions. Let me change my question...
2013 Jun 13
0
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
In a multi-threaded environment, in order to ensure the memory ordering expressed by the memory fence, certain memory operations should not be moved across the fence, right? From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Thursday, June 13, 2013 11:18 AM To: Guo, Xiaoyi Cc: LLVM Dev Subject: Re: [LLVMdev] A question w.r.t fence instruction vs. noalias pointer On Thu, Jun 13, 2013 at 10:52 AM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com<mailto:Xiaoyi.Guo at amd.com>> wrote: I mean something like a target-specific fence machine instruction which forces o...
2013 Jun 13
1
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
On Thu, Jun 13, 2013 at 11:39 AM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > In a multi-threaded environment, in order to ensure the memory ordering > expressed by the memory fence, certain memory operations should not be > moved across the fence, right?**** > > ** > Yes, but operations on noalias pointers...
2013 Jul 30
4
[LLVMdev] creating SCEV taking too long
On Jul 29, 2013, at 4:08 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > Hi, > > We have a benchmark where there are 128 MAD computations in a loop. (See the attached IR.) Creating SCEVs for these expressions takes a long time, making the compile time too long. E.g., running opt with the “indvars” pass only take...
2017 Feb 22
2
[Job Ad] Compiler Engineer positions at Intel
Hi, All, Our team within the Software and Services Group at Intel is looking for compiler engineers to join us. Currently two positions are available, see attached links. If you are interested, you can apply online or email me at xiangyang.guo at intel.com. Thanks. --Xiangyang (Mark) Guo *https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Web-Runtime-Compiler-Engineer_JR0815258-1 <https://intel.wd1.myworkdayjobs.com/External/job/US-Oregon-Hillsboro/Web-Runtime-Compiler-Engineer_JR0815258-1>* http://career.intel...
2013 Jun 13
0
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
...I have a target-specific intrinsic which forces ordering of ordinary load/store instructions. Then should it also force ordering of load/stores to noalias pointers in caller functions? Thanks, Xiaoyi From: Eli Friedman [mailto:eli.friedman at gmail.com] Sent: Wednesday, June 12, 2013 7:06 PM To: Guo, Xiaoyi Cc: LLVM Dev Subject: Re: [LLVMdev] A question w.r.t fence instruction vs. noalias pointer On Wed, Jun 12, 2013 at 6:17 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com<mailto:Xiaoyi.Guo at amd.com>> wrote: Hi, I have the following test case: define void @foo(<2 x float>* noali...
2013 Jul 30
0
[LLVMdev] creating SCEV taking too long
...e get deterministic /// results from this routine. In other words, we don't want the results of /// this to depend on where the addresses of various SCEV objects happened to /// land in memory. Xiaoyi From: Daniel Berlin [mailto:dberlin at dberlin.org] Sent: Monday, July 29, 2013 4:18 PM To: Guo, Xiaoyi Cc: LLVMdev at cs.uiuc.edu Subject: Re: [LLVMdev] creating SCEV taking too long On Mon, Jul 29, 2013 at 4:08 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com<mailto:Xiaoyi.Guo at amd.com>> wrote: Hi, We have a benchmark where there are 128 MAD computations in a loop. (See the attached...
2013 Jul 30
0
[LLVMdev] creating SCEV taking too long
...er, the problem still exists if the expressions to be compared are large, similar, and have the same length. Maybe I'll leave that to later when there's a test case for such situations? Thanks, Xiaoyi From: Andrew Trick [mailto:atrick at apple.com] Sent: Tuesday, July 30, 2013 2:20 PM To: Guo, Xiaoyi Cc: LLVMdev at cs.uiuc.edu; Dan Gohman Subject: Re: [LLVMdev] creating SCEV taking too long On Jul 29, 2013, at 4:08 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com<mailto:Xiaoyi.Guo at amd.com>> wrote: Hi, We have a benchmark where there are 128 MAD computations in a loop. (See the...
2013 Mar 27
0
[LLVMdev] Ordering not assigned to DAG Nodes create after DAG builder
...e missed, but I'd be interested in seeing a missed case. I'm guessing it's a legalization that expands to multiple new nodes. The AssignOrdering calls in the legalizer may need to be expanded to do the traversal you mention from SelectionDAGBuilder. On Tue, Mar 26, 2013 at 11:00 PM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com> wrote: > Hi,**** > > ** ** > > It seems orderings are not assigned to DAG nodes created after the DAG > builder, e.g., DAG nodes created during legalization. This causes > instructions being scheduled in different order than source order...
2013 Apr 30
2
[LLVMdev] [PATCH] Propagate DAG node ordering during legalization and instruction selection
Hi Eric, Sorry I wasn't clear. The problem happened in the "source" pre-RA scheduler, which relies on DAG node ordering to schedule the nodes. Xiaoyi From: Eric Christopher [mailto:echristo at gmail.com] Sent: Tuesday, April 30, 2013 12:54 AM To: Guo, Xiaoyi Cc: LLVM Developers Mailing List Subject: Re: [LLVMdev] [PATCH] Propagate DAG node ordering during legalization and instruction selection On Tue, Apr 30, 2013 at 12:48 AM, Guo, Xiaoyi <Xiaoyi.Guo at amd.com<mailto:Xiaoyi.Guo at amd.com>> wrote: Hi, We've recently encount...
2020 Jul 23
2
How to optimize out the duplicated memory load instructions?
...om> wrote: > `noalias` metadata is more complex than this: > > https://llvm.org/docs/LangRef.html#noalias-and-alias-scope-metadata > > I doubt the below was accepted by the AliasAnalysis as valid annotations > and consequently ignored. > > > On 7/23/20 10:48 AM, Terry Guo wrote: > > Hi Johannes, > > > > Thanks for your help. I tried with something like below and nothing > > changes. Maybe I am doing something wrong? > > > > 246001 check_exce_succ59: ; preds = > > %check_exce_succ40 > > **...
2013 Apr 30
0
[LLVMdev] [PATCH] Propagate DAG node ordering during legalization and instruction selection
On Apr 30, 2013, at 11:00 AM, "Guo, Xiaoyi" <Xiaoyi.Guo at amd.com> wrote: > Hi Eric, > > Sorry I wasn’t clear. The problem happened in the “source” pre-RA scheduler, which relies on DAG node ordering to schedule the nodes. In your case, Eric's suggestion was effectively "start implementing fast-isel...
2013 Mar 27
2
[LLVMdev] Ordering not assigned to DAG Nodes create after DAG builder
Hi, It seems orderings are not assigned to DAG nodes created after the DAG builder, e.g., DAG nodes created during legalization. This causes instructions being scheduled in different order than source order for O0. This is my plan to fix it: Make a utility routine that recursively assign ordering to a chain of nodes, just like what SelectionDAGBuilder::AssignOrderingToNode() does. Then add call
2019 Mar 26
2
How to revert a change properly
...you ran the svn command from the lib subdirectory instead of from the top level, and thus missed the tests that were part of your original commit. --paulr From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Don Hinton via llvm-dev Sent: Tuesday, March 26, 2019 4:57 AM To: Xing GUO Cc: LLVM Development List Subject: Re: [llvm-dev] How to revert a change properly Hi Xing: There's too much activity to automatically revert anything, so you need to commit a new change that effectively reverts the original patch -- keeping in mind that someone else might have changed some of...
2015 Dec 01
3
LICM doesn't work for IntrReadMem intrinsic function
On 1 December 2015 at 12:33, Xiangyang Guo via llvm-dev <llvm-dev at lists.llvm.org> wrote: > if I have the following IR, LICM doesn't work again, even if I use > '-loop-rotate' firstly. In this IR, the return value of intrinsic function > "foo" is used by another function "func2" as parameter....
2018 Jan 16
1
[GSoC18] About LLVM Projects
Dear LLVM Team: My name is Guo Xing, a student who are in his third year of college. GSoC2018 is coming, and I want to do some contribution for llvm community. However, the open projects page is for GSoC2017, and some projects like Shell auto-completion support for clang <http://llvm.org/OpenProjects.html#clang-shell-autocomp...