search for: guh

...t;, [(set CPURegs:$dst, > (add (MipsHi tglobaladdr:$addr0), (MipsLo > tglobaladdr:$addr1)))], IIAlu>; > > Note that you still need to find a way to print "g1" instead of "%hi(g1)". > > On Wed, Oct 5, 2011 at 4:01 PM, Gang-Ryung Uh <guh at boisestate.edu> wrote: > > Hi, > > In order to emit "la $4,ADDR" instead of lui followed by addiu to > load > > the data address, could you advise what is proper way to revise td files > in > > the MIPS target? > > Thanks, > > > >...

...(add (MipsHi tglobaladdr:$addr0), (MipsLo > > tglobaladdr:$addr1)))], IIAlu>; > > > > Note that you still need to find a way to print "g1" instead of > "%hi(g1)". > > > > On Wed, Oct 5, 2011 at 4:01 PM, Gang-Ryung Uh <guh at boisestate.edu> > wrote: > > > Hi, > > > In order to emit "la $4,ADDR" instead of lui followed by addiu to > load > > > the data address, could you advise what is proper way to revise td > files in > > > the MIPS target? > > &g...

..., [(set CPURegs:$dst, > (add (MipsHi tglobaladdr:$addr0), (MipsLo > tglobaladdr:$addr1)))], IIAlu>; > > Note that you still need to find a way to print "g1" instead of "%hi(g1)". > > On Wed, Oct 5, 2011 at 4:01 PM, Gang-Ryung Uh <guh at boisestate.edu> wrote: > > Hi, > > In order to emit "la $4,ADDR" instead of lui followed by addiu to load > > the data address, could you advise what is proper way to revise td files in > > the MIPS target? > > Thanks, > > > > -- > &...

...DDR" instead of lui followed by addiu to load the data address, could you advise what is proper way to revise td files in the MIPS target? Thanks, -- Gang-Ryung Uh, Associate Professor Department of Computer Science College of Engineering, Boise State Univerisity tel: 1 208 426-5691 e-mail:guh at boisestate.edu http://cs.boisestate.edu/~uh -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111005/623e2d60/attachment.html>

..."la $dst, $addr0", [(set CPURegs:$dst, (add (MipsHi tglobaladdr:$addr0), (MipsLo tglobaladdr:$addr1)))], IIAlu>; Note that you still need to find a way to print "g1" instead of "%hi(g1)". On Wed, Oct 5, 2011 at 4:01 PM, Gang-Ryung Uh <guh at boisestate.edu> wrote: > Hi, >      In order to emit "la $4,ADDR" instead of lui followed by addiu to load > the data address, could you advise what is proper way to revise td files in > the MIPS target? > Thanks, > > -- > Gang-Ryung Uh, Associate Professor &...

Hi, I wonder what PRE algorithm is used for the GVN.cpp in LLVM. Any reference will be appreciated. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140930/3d7f74e3/attachment.html>

Hi, How to perform a stepwise selection of the best models for gee? Why can't step() do this job? Thanks. Sincerely Yours, Jinn-Yuh Guh, M.D. Dept. of Internal Medicine Kaohsiung Medical College 100 Shi-Chuan 1st Road Kaohsiung, Taiwan FAX: 886-7-312-2810 e-mail: jyuh at mail.nsysu.edu.tw -------------- next part -------------- An HTML attachment was scrubbed... URL: https://stat.ethz.ch/pipermail/r-help/attachments/20000411/687a4...

...a. y~gee(y~d+(a-d)/(1+(x/c)^b)) Error in terms.formula(formula, data = data) : invalid power in formula b. y~gee(y~d+(a-d)/(1+(x/c)) Error in model.frame(formula, rownames, variables, varnames, extras, extranames, : variable lengths differ Why? Thanks! Sincerely Yours, Jinn-Yuh Guh, M.D. Dept. of Internal Medicine Kaohsiung Medical College 100 Shi-Chuan 1st Road Kaohsiung, Taiwan FAX: 886-7-312-2810 e-mail: jyuh at mail.nsysu.edu.tw -------------- next part -------------- An HTML attachment was scrubbed... URL: https://stat.ethz.ch/pipermail/r-help/attachments/20000404/82702...

...his right now but I can imagine using it in the > > future. > > The reg def/kill/dead flags are all that there is. I just discovered that def_itterator (and presumably, reg_iterator) doesn't include implicit defs, for example at function calls for caller-save physical registers. Guh. I'm not sure if it should or not, but it's certainly necessary information in some cases. Is this expected behavior, or an oversight? -Dave

On Mon, 31 Mar 2008, Evan Cheng wrote: >> I just discovered that def_itterator (and presumably, reg_iterator) >> doesn't >> include implicit defs, for example at function calls for caller-save >> physical >> registers. Guh. I'm not sure if it should or not, but it's certainly >> necessary information in some cases. Is this expected behavior, or an >> oversight? reg iterators will return everything that is in the function. If the implicit operands haven't been added to the machieninstrs ye...

...-o foo.s (the -march option is redundant) If you do not specify the target cpu with -mcpu, by default it will generate code for Mips1, which has not been tested as thoroughly as Mips32r2 (-mcpu=4ke) or Mips2 (-mcpu=mips2). The default ABI is o32. On Sat, Jul 9, 2011 at 8:32 AM, Gang-Ryung Uh <guh at boisestate.edu> wrote: > We are trying to use LLVM (Clang as the C frontend) to generate code for > 32-bit MIPS (little-endian)l, which can run on simplescalar 3.0 > sslittle-na-sstrix platform. Can you advise what would be the right way to > use the LLVM compiler infrastructure?...

...ant) > > If you do not specify the target cpu with -mcpu, by default it will > generate code for Mips1, which has not been tested as thoroughly as Mips32r2 > (-mcpu=4ke) or Mips2 (-mcpu=mips2). > > The default ABI is o32. > > On Sat, Jul 9, 2011 at 8:32 AM, Gang-Ryung Uh <guh at boisestate.edu> wrote: > >> We are trying to use LLVM (Clang as the C frontend) to generate code for >> 32-bit MIPS (little-endian)l, which can run on simplescalar 3.0 >> sslittle-na-sstrix platform. Can you advise what would be the right way to >> use the LLVM comp...

We are trying to use LLVM (Clang as the C frontend) to generate code for 32-bit MIPS (little-endian)l, which can run on simplescalar 3.0 sslittle-na-sstrix platform. Can you advise what would be the right way to use the LLVM compiler infrastructure? The following is the one I used, but it appears that it produce the code in big-endian (and I wonder whether the calling convention is right.) To

On Tuesday 27 January 2009 18:28, Eli Friedman wrote: > You can use a no-op bitcast for scalars, but there isn't any reliable > way to do it for all first-class values. Guh. > That said, I don't quite follow the issue. This is SSA, so the only way a > value can change is if you change the code. This isn't (yet) SSA. This is mem2reg turning things into SSA. > I'm not really following what the issue is in this testcase, though, > so I could...

...to > load the data address, could you advise what is proper way to revise td > files in the MIPS target? > > Why? > > -eric > > -- Gang-Ryung Uh, Associate Professor Department of Computer Science College of Engineering, Boise State Univerisity tel: 1 208 426-5691 e-mail:guh at boisestate.edu http://cs.boisestate.edu/~uh -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111005/3e386d99/attachment.html>

...p" "exchangeable" "AR-M" "unstructured" What does each term mean? How do I choose among them? How do I know the correlation structure of my repeated measures data? Can non-normally distributed X1, X2 be used? Thank you very much. Sincerely, Jinn-Yuh Guh Kaohsiung Medical Colege jyuh at mail.nsysu.edu.tw -------------- next part -------------- An HTML attachment was scrubbed... URL: https://stat.ethz.ch/pipermail/r-help/attachments/20000318/4617966b/attachment.html

...n the >>> future. >> >> The reg def/kill/dead flags are all that there is. > > I just discovered that def_itterator (and presumably, reg_iterator) > doesn't > include implicit defs, for example at function calls for caller-save > physical > registers. Guh. I'm not sure if it should or not, but it's certainly > necessary information in some cases. Is this expected behavior, or an > oversight? MachineRegisterInfo tracks virtual register only. I also wish it would track physical register defs and uses as well. It can be used to simp...

On Jan 28, 2009, at 9:06 AM, David Greene wrote: > On Tuesday 27 January 2009 18:28, Eli Friedman wrote: > >> You can use a no-op bitcast for scalars, but there isn't any reliable >> way to do it for all first-class values. > > Guh. > >> That said, I don't quite follow the issue. This is SSA, so the >> only way a >> value can change is if you change the code. > > This isn't (yet) SSA. This is mem2reg turning things into SSA. > >> I'm not really following what the issue is in...

...Lattner wrote: > On Mon, 31 Mar 2008, Evan Cheng wrote: > >> I just discovered that def_itterator (and presumably, reg_iterator) > >> doesn't > >> include implicit defs, for example at function calls for caller-save > >> physical > >> registers. Guh. I'm not sure if it should or not, but it's certainly > >> necessary information in some cases. Is this expected behavior, or an > >> oversight? > > reg iterators will return everything that is in the function. If the > implicit operands haven't been added...

Hello, I''m working with scaffold generated controller test code for handling GET requests. Address is the model being tested. Address belongs_to Company, Company has_many addresses. In my addresses_controller I have: before_filter :get_company def index @addresses = @company.addresses.find(:all) respond_to do |format| format.html # index.html.erb format.xml {