search for: guest_intr_status

...x86/hvm/vmx/intr.c @@ -290,8 +290,8 @@ void vmx_intr_assist(void) vmx_set_eoi_exit_bitmap(v, pt_vector); /* we need update the RVI field */ - status &= ~(unsigned long)0x0FF; - status |= (unsigned long)0x0FF & + status &= ~(unsigned long)VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK; + status |= (unsigned long)VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK & intack.vector; __vmwrite(GUEST_INTR_STATUS, status); if (v->arch.hvm_vmx.eoi_exitmap_changed) { diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/...

...hvm_inject_hw_exception(TRAP_machine_check, HVM_DELIVER_NO_ERROR_CODE); } + else if ( cpu_has_vmx_virtual_intr_delivery && + intack.source != hvm_intsrc_pic && + intack.source != hvm_intsrc_vector ) + { + unsigned long status = __vmread(GUEST_INTR_STATUS); + + /* + * Set eoi_exit_bitmap for periodic timer interrup to cause EOI-induced VM + * exit, then pending periodic time interrups have the chance to be injected + * for compensation + */ + if (pt_vector != -1) + vmx_set_eoi_exit_bitmap(v, pt_vec...

From: Yang Zhang <yang.z.zhang@Intel.com> The following patches fix the issue that fail to boot L2 guest on APIC-v available machine. The main problem is that with APIC-v, virtual interrupt inject L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running, L1 will detect interrupt through vmexit with reason external interrupt. If this happens, we should update

From: Yang Zhang <yang.z.zhang@Intel.com> The follwoing patches are adding the Posted Interrupt supporting to Xen: Posted Interrupt allows vAPIC interrupts to inject into guest directly without any vmexit. - When delivering a interrupt to guest, if target vcpu is running, update Posted-interrupt requests bitmap and send a notification event to the vcpu. Then the vcpu will handle this