Displaying 4 results from an estimated 4 matches for "guest_gs_a".
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  guest_gs_d
  
2007 Apr 18
0
[RFC/PATCH LGUEST X86_64 05/13] asm-offsets update
...Y
+#define ENTRY(entry)  DEFINE(LGUEST_VCPU_ ##entry, offsetof(struct lguest_vcpu, entry))
+	ENTRY(vcpu);
+	ENTRY(debug);
+	ENTRY(magic);
+	ENTRY(guest_syscall);
+	ENTRY(host_stack);
+	ENTRY(host_cr3);
+	ENTRY(host_gs_a);
+	ENTRY(host_gs_d);
+	ENTRY(host_proc_gs_a);
+	ENTRY(host_proc_gs_d);
+	ENTRY(guest_gs_a);
+	ENTRY(guest_gs_d);
+	ENTRY(gdt);
+	ENTRY(idt);
+	ENTRY(host_gdt);
+	ENTRY(host_idt);
+	ENTRY(host_gdt_ptr);
+	ENTRY(gdt_table);
+	DEFINE(LGUEST_VCPU_trapnum, offsetof(struct lguest_vcpu, regs.trapnum));
+	DEFINE(LGUEST_VCPU_errcode, offsetof(struct lguest_vcpu, regs.errcode));
+	DEFINE(LGUEST_V...
2007 Apr 18
0
[RFC/PATCH LGUEST X86_64 05/13] asm-offsets update
...Y
+#define ENTRY(entry)  DEFINE(LGUEST_VCPU_ ##entry, offsetof(struct lguest_vcpu, entry))
+	ENTRY(vcpu);
+	ENTRY(debug);
+	ENTRY(magic);
+	ENTRY(guest_syscall);
+	ENTRY(host_stack);
+	ENTRY(host_cr3);
+	ENTRY(host_gs_a);
+	ENTRY(host_gs_d);
+	ENTRY(host_proc_gs_a);
+	ENTRY(host_proc_gs_d);
+	ENTRY(guest_gs_a);
+	ENTRY(guest_gs_d);
+	ENTRY(gdt);
+	ENTRY(idt);
+	ENTRY(host_gdt);
+	ENTRY(host_idt);
+	ENTRY(host_gdt_ptr);
+	ENTRY(gdt_table);
+	DEFINE(LGUEST_VCPU_trapnum, offsetof(struct lguest_vcpu, regs.trapnum));
+	DEFINE(LGUEST_VCPU_errcode, offsetof(struct lguest_vcpu, regs.errcode));
+	DEFINE(LGUEST_V...
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...;);
+		break;
+	case LHCALL_RDMSR:
+		switch (regs->rdx) {
+		case MSR_KERNEL_GS_BASE:
+			val = (vcpu->guest_gs_shadow_a & ((1UL << 32)-1)) |
+				(vcpu->guest_gs_shadow_d << 32);
+			lhwrite_u64(vcpu, regs->rbx, val);
+			break;
+		case MSR_GS_BASE:
+			val = (vcpu->guest_gs_a & ((1UL << 32)-1)) |
+				(vcpu->guest_gs_d << 32);
+			lhwrite_u64(vcpu, regs->rbx, val);
+		break;
+		case MSR_FS_BASE:
+			lhwrite_u64(vcpu, regs->rbx, 0);
+		break;
+		case MSR_EFER:
+			val = EFER_SCE | EFER_LME | EFER_LMA | EFER_NX;
+			lhwrite_u64(vcpu, regs->rbx,...
2007 Apr 18
1
[RFC/PATCH LGUEST X86_64 03/13] lguest64 core
...;);
+		break;
+	case LHCALL_RDMSR:
+		switch (regs->rdx) {
+		case MSR_KERNEL_GS_BASE:
+			val = (vcpu->guest_gs_shadow_a & ((1UL << 32)-1)) |
+				(vcpu->guest_gs_shadow_d << 32);
+			lhwrite_u64(vcpu, regs->rbx, val);
+			break;
+		case MSR_GS_BASE:
+			val = (vcpu->guest_gs_a & ((1UL << 32)-1)) |
+				(vcpu->guest_gs_d << 32);
+			lhwrite_u64(vcpu, regs->rbx, val);
+		break;
+		case MSR_FS_BASE:
+			lhwrite_u64(vcpu, regs->rbx, 0);
+		break;
+		case MSR_EFER:
+			val = EFER_SCE | EFER_LME | EFER_LMA | EFER_NX;
+			lhwrite_u64(vcpu, regs->rbx,...