search for: guest_cr

Displaying 13 results from an estimated 13 matches for "guest_cr".

Did you mean: guest_cr3
2011 Nov 24
0
[PATCH 6/6] X86: implement PCID/INVPCID for hvm
..."while CR4.PCIDE=1"); + goto gpf; + } + /* When CR0.PG is cleared, LMA is cleared immediately. */ if ( hvm_long_mode_enabled(v) ) { @@ -1663,12 +1670,26 @@ int hvm_set_cr4(unsigned long value) } old_cr = v->arch.hvm_vcpu.guest_cr[4]; + + if ( (value & X86_CR4_PCIDE) && !(old_cr & X86_CR4_PCIDE) && + (!hvm_long_mode_enabled(v) || (v->arch.hvm_vcpu.guest_cr[3] & 0xfff)) ) + { + HVM_DBG_LOG(DBG_LEVEL_1, "Guest attempts to change CR4.PCIDE from " +...
2013 Sep 22
1
[PATCH] Nested VMX: Expose unrestricted guest feature to guest
...m/hvm.c b/xen/arch/x86/hvm/hvm.c index 7203184..481cb71 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1732,7 +1732,8 @@ int hvm_set_cr0(unsigned long value) { if ( v->arch.hvm_vcpu.guest_efer & EFER_LME ) { - if ( !(v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_PAE) ) + if ( !(v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_PAE) && + !nestedhvm_vmswitch_in_progress(v) ) { HVM_DBG_LOG(DBG_LEVEL_1, "Enable paging before PAE enable"); goto gpf; diff --g...
2013 Nov 18
6
[PATCH RFC v2] pvh: clearly specify used parameters in vcpu_guest_context
...need to - * make it pay attention to the kernel bit. - */ - hvm_set_info_guest(v, compat ? 0 : c.nat->gs_base_kernel); if ( is_hvm_vcpu(v) || v->is_initialised ) goto out; + if ( c.nat->ctrlreg[0] ) { + v->arch.hvm_vcpu.guest_cr[0] |= c.nat->ctrlreg[0]; + hvm_update_guest_cr(v, 0); + } + + if ( c.nat->ctrlreg[4] ) { + v->arch.hvm_vcpu.guest_cr[4] |= c.nat->ctrlreg[4]; + hvm_update_guest_cr(v, 4); + } + /* NB: No need to use PV cr3 un-pickling macros...
2012 Sep 11
0
[PATCH 1/3] x86/hvm: don't use indirect calls without need
...,%%" STR(name) "" : : "a" (value) ) +static void svm_update_guest_efer(struct vcpu *); + static struct hvm_function_table svm_function_table; /* va of hardware host save area */ @@ -269,9 +271,9 @@ static int svm_vmcb_restore(struct vcpu v->arch.hvm_vcpu.guest_cr[2] = c->cr2; v->arch.hvm_vcpu.guest_cr[3] = c->cr3; v->arch.hvm_vcpu.guest_cr[4] = c->cr4; - hvm_update_guest_cr(v, 0); - hvm_update_guest_cr(v, 2); - hvm_update_guest_cr(v, 4); + svm_update_guest_cr(v, 0); + svm_update_guest_cr(v, 2); + svm_update_guest_c...
2012 Sep 10
10
[PATCH] mem_event: fix regression affecting CR3, CR4 memory events
...Sep 10 16:48:15 2012 -0400 @@ -1758,6 +1758,7 @@ int hvm_set_cr3(unsigned long value) { struct vcpu *v = current; struct page_info *page; + unsigned long old; if ( hvm_paging_enabled(v) && !paging_mode_hap(v->domain) && (value != v->arch.hvm_vcpu.guest_cr[3]) ) @@ -1775,8 +1776,10 @@ int hvm_set_cr3(unsigned long value) HVM_DBG_LOG(DBG_LEVEL_VMMU, "Update CR3 value = %lx", value); } + old=v->arch.hvm_vcpu.guest_cr[3]; v->arch.hvm_vcpu.guest_cr[3] = value; paging_update_cr3(v); + hvm_memory_event_cr3(va...
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.
2011 Sep 23
2
Some problems about xenpaging
...m); return 0; } 3) fix the vmx_load_pdptrs() function in vmx.c in this situation the page directory table is paged out. Although using mdelay() is a bad idea, it''s better than making the xen crash void vmx_load_pdptrs(struct vcpu *v) { unsigned long cr3 = v->arch.hvm_vcpu.guest_cr[3], mfn; uint64_t *guest_pdptrs; p2m_type_t p2mt; char *p; unsigned int try_count = 0; /* EPT needs to load PDPTRS into VMCS for PAE. */ if ( !hvm_pae_enabled(v) || (v->arch.hvm_vcpu.guest_efer & EFER_LMA) ) return; if ( cr3 & 0x1fUL ) goto cra...
2012 May 30
12
[PATCH v2 0/4] XEN: fix vmx exception mistake
Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),
2010 Aug 05
6
[PATCH 10/14] Nested Virtualization: svm specific implementation
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list
2011 Jun 27
20
[PATCH 0 of 5] v2: Nested-p2m cleanups and locking changes
This patch series tidies up a few bits ofthe nested p2m code. The main thing it does is reorganize the locking so that most of the changes to nested p2m tables happen only under the p2m lock, and the nestedp2m lock is only needed to reassign p2m tables to new cr3 values. Changes since v1: - a few minor fixes - more sensible flushing policy in p2m_get_nestedp2m() - smoke-tested this time!
2012 May 24
11
[PATCH 0/3] XEN: fix vmx exception mistake
This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length
2012 Dec 10
26
[PATCH 00/11] Add virtual EPT support Xen.
From: Zhang Xiantao <xiantao.zhang@intel.com> With virtual EPT support, L1 hyerpvisor can use EPT hardware for L2 guest''s memory virtualization. In this way, L2 guest''s performance can be improved sharply. According to our testing, some benchmarks can show > 5x performance gain. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Zhang Xiantao (11):
2013 Dec 06
36
[V6 PATCH 0/7]: PVH dom0....
Hi, V6: The only change from V5 is in patch #6: - changed comment to reflect autoxlate - removed a redundant ASSERT - reworked logic a bit so that get_page_from_gfn() is called with NULL for p2m type as before. arm has ASSERT wanting it to be NULL. Tim: patch 4 needs your approval. Daniel: patch 5 needs your approval. These patches implement PVH dom0. Patches 1 and 2