search for: guarantee

Dear all, I''ve got a working HTB configuration with iptables, fwmark, SFQ etc. At the moment, I can mark traffic and give it a maximum bandwidth and a minimum guaranteed bandwidth, so far so good. What I would like to do is the following: In stead of defining a min/max for a certain type of traffic (e.g. http, ftp whatever), I would like to define a "minimum guaranteed bandwidth per connection". e.g. An application connecting to port X would get 10kbit...

...ed in order? For instance, suppose an application requests that a file be deleted, and then that another file be moved to an unrelated place. Will these events always happen in that order? Or to put it another way, if something unexpected happens in the meantime (say the computer crashes), is it guaranteed that just the second action won't have been performed (i.e. that the second action was done first and the crash happened just after that)? How about if a file is written (and closed) and then a different file is moved? Is it possible that the second file gets moved before all the data is...

...last day''s data, but it would be a huge disaster to lose significantly more than that because of bad backups or operator error - downtime / restore time is a big concern; the app has to be highly available. We''re not talking 5 9''s uptime, but something like 99.9% *with a guarantee* is what I''m after - cost will be an issue Not having great experience with hosting providers, I''m not really sure how vendors such as Dreamhost would fit these requirements. How reliable are their backups? What security arrangements are there around online and backed up data ?...

> Then why does the Release Note say > " the operation is guaranteed to not overflow". It means that the person who wrote the IR has guaranteed that there's no overflow (by some means) so LLVM can assume it during optimisation. This guarantee might come from doing explicit checks before executing the add/sub; or perhaps from performing the operation afte...

There is PostDominatorTree for determining post-dominance. Even if A post-dominates B and B is executed, that doesn't guarantee that A will be executed. For example, there could be an infinite loop in-between. Strong post-dominance makes the stronger guarantee that there will be no infinite loop from B to A. Do we have anything in LLVM for determining strong post-dominance and in general for guaranteeing that if B is execut...

...ow in TableGen: defm ADD64 : ALU32<"add", 1, 1, addc>; defm ADD64C : ALU32<"addrc", 1, 2, adde>; Let's assume that the carry bit is implicit and that the 2 operations must *always* be stuck together for the 64-bit add to work properly. Is there a default guarantee that nothing will ever be inserted between "add" and "addrc" or is there a flag/condition to set somewhere to have that guarantee? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/201...

...ixing >> the ABI, provided that we document the attribute as such. It should >> be safe to use in compiler_rt once we modify its build system to use the >> just-built clang. > > I agree that we could certainly expose a calling convention with zero > binary-compatibility guarantees. I don't know if that would work for what > Richard wants, though. Notably, you can't stick that sort of thing in a > library that you haven't rev-locked to the compiler. CC'ing llvmdev. Okay, so per recent traffic on this thread, it sounds like this is not currently requ...

...<llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote: >> >> Hello everyone, >> >> After reading the nice blog post about _ExtInt, I was wondering whether >> operations on i128/i256 and more generally on integer types in LLVM are >> guaranteed to be constant time or not. > I don't believe there's any such guarantee even for normal 8/16/32/64 > -bit integers. Right. I would expect this to be implementation / target dependent. The maximum bit width of an integer may also be target specific. For example, some targets may n...

...crashing (I''ve been looking at the SLES 3.0.2 9742c code.), but I found that I was getting filesystem errors. I''m wondering if the problem is races in data being written to the backing storage. When migrating a domain, before the domain is started on the new host, you have to guarantee that all the domU vbd data is out of the block cache and written to the backing device. (In the case of a loopback device, whether this is sufficient depends on the cross-host coherency guarantees of the backing filesystem.) I cannot see that this takes place synchronously with the migration pr...

...to TCO of a non-recursive tail call as sibling call optimization, but I'm going to refer to that generically as TCO. Often, functional languages like Scheme have a language-level requirement that TCO occurs for any call in the tail position, and this is usually why users of LLVM have asked for guaranteed TCO functionality. In my case, to implement vtable thunks and virtual member pointers in the IA32 Microsoft C++ ABI, I cannot simply forward the arguments to the callee without calling the copy constructor. If I can use a guaranteed tail call, I don't have to emit copy constructor calls, and...

...BI, provided that we document the attribute as such. It should >>> be safe to use in compiler_rt once we modify its build system to use the >>> just-built clang. >> >> I agree that we could certainly expose a calling convention with zero >> binary-compatibility guarantees. I don't know if that would work for what >> Richard wants, though. Notably, you can't stick that sort of thing in a >> library that you haven't rev-locked to the compiler. > > CC'ing llvmdev. > > Okay, so per recent traffic on this thread, it sounds lik...

...class numeric. The calculations performed to yield x imply that mathematically it should be an integer , but due to round-off errors, it might not be (and so in either direction). The error is however small, so round(x) will yield the appropriate integer value. Moreover, this integer values is guaranteed to be representable by an 'integer' class, that is -2^31 < x < 2^31, and logically it is an integer anyway. So I want to convert x from class 'numeric' to 'integer'. What is the most elegant, but always correct way, to achieve this conversion ? What comes to mind...

...t 12:32 AM, David Blaikie <dblaikie at gmail.com> > wrote: > >> >> >> On Mon, Mar 21, 2016 at 4:21 PM, Rui Ueyama <ruiu at google.com> wrote: >> >>> From the user's point of view, I think it's still the same. As long as >>> LLVM is guaranteed to be undefined behavior-free (including any unknown >>> bugs), users are not guaranteed from getting undefined outputs. (And please >>> keep it in mind that we are talking about rare cases such as you created >>> ELF files by your own by hand or with a buggy tool.) >...

...DD64 : ALU32<"add", 1, 1, addc>; > defm ADD64C : ALU32<"addrc", 1, 2, adde>; > > > Let's assume that the carry bit is implicit and that the 2 operations must *always* be stuck together for the 64-bit add to work properly. > Is there a default guarantee that nothing will ever be inserted between "add" and "addrc" or is there a flag/condition to set somewhere to have that guarantee? The register allocator expects to be able to insert spill code and copies between any instructions, except terminators. The only way around that i...

...__attribute__((section(“foo”))) int y; And i compile and link these two object files together using lld. What assumptions can I make regarding alignment/padding between the two symbols? I’m comfortable getting an answer by reading the source, but that won’t tell if any properties i discover are guaranteed or just happenstance. Are all of the following guaranteed ? A) relative order of symbols within a TU is not modified by the linker B) No padding is inserted by the linker between symbols in a TU aside from that which was already inserted by the compiler/assembler C) When merging section A from in...

...n DI, see Felipe's answer. > Maybe I missed something. There seems to be no resolution to the problem. How can DA fix this without help from alias analysis? DependenceInfo is not using the AA interface correctly. Either DI has to be fixed, or another method added to AA that gives additional guarantees. Please see the bug report for details. > >> Since aliasPHI looks for any incoming value contradicting the NoAlias assumption, it would be equivalant to always return MayAlias. > I pasted the code snippet below with some extra comments. As far as the AA interface specification is co...

Hi ZFS Team, I have a couple of questions... Assume that the maximum slab size that ZFS supports is x. (I am assuming there is a maximum.) An application does a (single) write(2) for 2x bytes. Does ZFS/COW guarantee that either all the 2x bytes are persistent or none at all? Consider a case where there is a panic after x bytes has gone to disk and the change propagated to the uber block. Do the uber-block and metadata blocks get updated with the entire write(2) or nothing? In other words, does ZFS'...

...wrong?? My rule are like this Root Real time class Non-real time class #interior class (Voip ,MMS, Telnet, default) (HTTP FTP default) #leaf class My setting rate in each class is Real time class guarantee rate: 3500kbit max rate: 10000kbit VoIP guarantee rate: 200kbit max rate: 3500kbit MMS guarantee rate: 1300kbit max rate: 3500kbit Telnet guarantee rate: 1500kbit max rate: 3500kbit D...

...DD64 : ALU32<"add", 1, 1, addc>; > defm ADD64C : ALU32<"addrc", 1, 2, adde>; > > > Let's assume that the carry bit is implicit and that the 2 operations must *always* be stuck together for the 64-bit add to work properly. > Is there a default guarantee that nothing will ever be inserted between "add" and "addrc" or is there a flag/condition to set somewhere to have that guarantee? > > Thanks > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu h...

...uot;add", 1, 1, addc>; >> defm ADD64C : ALU32<"addrc", 1, 2, adde>; >> >> >> Let's assume that the carry bit is implicit and that the 2 operations must *always* be stuck together for the 64-bit add to work properly. >> Is there a default guarantee that nothing will ever be inserted between "add" and "addrc" or is there a flag/condition to set somewhere to have that guarantee? > The register allocator expects to be able to insert spill code and copies between any instructions, except terminators. > > The only way...