search for: gt215_pmu_send

...kworker/0:1 Not tainted 4.20.0-rc1+ #5 Hardware name: AMD Seattle/Seattle, BIOS 20:07:19 Oct 2 2018 Workqueue: events nvkm_pstate_work [nouveau] Call trace: dump_backtrace+0x0/0x1d0 show_stack+0x24/0x30 dump_stack+0x98/0xbc __schedule_bug+0x64/0x80 __schedule+0x818/0x9b8 schedule+0x40/0xa8 gt215_pmu_send+0x274/0x2a8 [nouveau] nvkm_pmu_send+0x60/0x80 [nouveau] nvkm_memx_init+0x5c/0x120 [nouveau] gt215_ram_calc+0x12f8/0x4d58 [nouveau] gt215_ram_calc+0x2a0/0x4d58 [nouveau] nvkm_pstate_work+0x18c/0x6b0 [nouveau] process_one_work+0x1a8/0x438 worker_thread+0x54/0x3f8 kthread+0x104/0x130 ret_from...

reworked this series quite a lot. Now we want the Host to configure the counters through the PMU. The series isn't complete though because it needs: 1. reordering 2. better commit messages but I felt like sending those out before doing a final version. I also found some weird register overwriting issue on the PMU I have to track down, because it interfers with the counter read out. I am

I think I am done reworking the series and getting to a point where I think it is basically finished. The configuration of the slots could be improved later on when working on dynamic reclocking, but for now it's good enough to report the current GPU utilization to userspace. Patches 1-4 imeplement PMU commands to setup and readout the counters. Patches 5-6 lets Nouveau make use of 1-4. Patch

This revision includes initial signed PMU firmware support for GM20B (Tegra X1). This PMU code will also be used as a basis for dGPU signed PMU firmware support. With the PMU code, the refactoring of secure boot should also make more sense. ACR (secure boot) support is now separated by the driver version it originates from. This separation allows to run any version of the ACR on any chip,