Displaying 3 results from an estimated 3 matches for "gr32bit".
2017 Nov 30
2
TwoAddressInstructionPass bug?
...instruction:
- def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>;
+ let hasSideEffects = 0 in
+ def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>;
The input to TwoAddress is:
BB#0: derived from LLVM BB %0
Live Ins: %r2l
%vreg0<def> = COPY %r2l<kill>; GR32Bit:%vreg0
%vreg9<def,tied1> = NIFMux %vreg0<tied0>, 14,
%cc<imp-def,dead>; GRX32Bit:%vreg9 GR32Bit:%vreg0
%vreg4<def,tied1> = NIFMux %vreg0<tied0>, 254,
%cc<imp-def,dead>; GRX32Bit:%vreg4 GR32Bit:%vreg0
%vreg2<def> = COPY %vreg0<...
2017 Nov 30
0
TwoAddressInstructionPass bug?
...SelectRIEfPseudo<GRX32, GRX32>;
> + let hasSideEffects = 0 in
> + def RISBMux : RotateSelectRIEfPseudo<GRX32, GRX32>;
>
> The input to TwoAddress is:
>
> BB#0: derived from LLVM BB %0
> Live Ins: %r2l
> %vreg0<def> = COPY %r2l<kill>; GR32Bit:%vreg0
> %vreg9<def,tied1> = NIFMux %vreg0<tied0>, 14, %cc<imp-def,dead>; GRX32Bit:%vreg9 GR32Bit:%vreg0
> %vreg4<def,tied1> = NIFMux %vreg0<tied0>, 254, %cc<imp-def,dead>; GRX32Bit:%vreg4 GR32Bit:%vreg0
> %vreg2<def> = COPY...
2016 Feb 03
2
[buildSchedGraph] memory dependencies
...return false;
+ }
+
if (isUnsafeMemoryObject(MIa, MFI, DL) || isUnsafeMemoryObject(MIb,
MFI, DL))
return true;
2) The TBAA tags should separate the loads from the stores. In the MF I see
...
%vreg32<def> = L %vreg0, 56, %noreg;
mem:LD4[%src1(align=64)+56](align=8)(tbaa=!1) GR32Bit:%vreg32
ADDR64Bit:%vreg0
...
ST %vreg33, %vreg1, 60, %noreg;
mem:ST4[%dest(align=64)+60](align=4)(tbaa=!4) GR32Bit:%vreg33
ADDR64Bit:%vreg1
...
Since the tbba tags are part of the MachineMemOperands, it is easy to
just continue the patch (above isUnsafeMemoryObject() checks) with
+ AAMDNodes...