Displaying 2 results from an estimated 2 matches for "gr16regclass".
2012 Apr 22
0
[LLVMdev] FYI: Removal of XXXRegisterClass from GenRegisterInfo.inc
...ring. For example,
addRegisterClass(MVT::i8, X86::GR8RegisterClass);
addRegisterClass(MVT::i16, X86::GR16RegisterClass);
addRegisterClass(MVT::i32, X86::GR32RegisterClass);
These should be changed to
addRegisterClass(MVT::i8, &X86::GR8RegClass);
addRegisterClass(MVT::i16, &X86::GR16RegClass);
addRegisterClass(MVT::i32, &X86::GR32RegClass);
Hopefully, this change won't cause too much trouble.
--
~Craig
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2007 Jul 03
2
[LLVMdev] Swaps of FP registers
...86RegisterInfo::swapRegs(
MachineBasicBlock & mbb,
MachineBasicBlock::iterator mi,
unsigned r1,
unsigned r2,
const TargetRegisterClass *rc
) const {
unsigned Opc;
if (rc == &X86::GR32RegClass) {
Opc = X86::XCHG32rr;
} else if (rc == &X86::GR16RegClass) {
Opc = X86::XCHG16rr;
} else if (rc == &X86::GR8RegClass) {
Opc = X86::XCHG8rr;
} else {
assert(0 && "Unknown regclass in add swap");
abort();
}
BuildMI(mbb, mi, Opc, 1, r1).addReg(r2);
}
thanks,
Fernando