Displaying 2 results from an estimated 2 matches for "gqw9ed".
2019 Dec 11
2
IR inline assembly: the x86 Intel "offset" operator
Interesting - the patch doesn't address this yet. It looks like we have a
difference (maybe bug?) in how we handle Intel vs. AT&T inline assembly:
https://godbolt.org/z/GQw9ED
Suppose we're expanding an operand with an 'i' constraint, where the
operand is given as, e.g. (i32* @Bar).
If the inline assembly is in Intel dialect, this expands as "Bar" in AT&T
syntax or "dword ptr [Bar]" in Intel syntax.
If the inline assembly is in AT&...
2019 Dec 09
4
IR inline assembly: the x86 Intel "offset" operator
Hi all,
I'm trying to land (a rebased version of) http://llvm.org/D37461 - which
should make it possible to handle x86 Intel assembly like
mov eax, offset Foo::ptr + 1
(Currently, omitting the +1 works... but offset doesn't work in compound
expressions.)
I'm having trouble figuring out what inline assembly I can emit into the
LLVM IR that will work properly. So far, the closest