search for: gputest

Displaying 8 results from an estimated 8 matches for "gputest".

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2010 Nov 08
0
Segmentation Fault when using CUDA
...when R closes. Not on garbage collection but only on exit. Is there anything in the R internals that explain why this is happening? The relevant C++ code is --- void gpualloctest(){ char * _a; cudaMalloc(&_a,sizeof(char)); cudaFree(_a); _a=NULL; } --- from gpu.cu gputest<-function(){ cat("testing allocation on gpu\n") Module('test','gputest')$gpualloctest() cat("Test successful\n") cat("Collecting Garbage\n") gc() cat("done.\n") } --- from gputest.R As you can see...
2019 Sep 17
13
[Bug 111724] New: NVE6 (GK106) memory re-clocking breaks GpuTest plot3d benchmark
https://bugs.freedesktop.org/show_bug.cgi?id=111724 Bug ID: 111724 Summary: NVE6 (GK106) memory re-clocking breaks GpuTest plot3d benchmark Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: not set Component: Driver/nouveau Assignee: nouv...
2019 Sep 04
1
[RFC PATCH v2] clk: Remove BYPASS_PLL_CHECK from PLLs
I have looked at problem with Fermi GPUs where changing to higher clock led to really bad perfomance (with GpuTest 20x worse perfomance) and later also crashes of the nouveau. It seemed to be affected by Shader Clock in Voltage Entries in the video BIOS. Disabling BYPASS_PLL_CHECK in CLK0_CTRL seems to completely fix the issue. I have tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it wasn'...
2019 Sep 06
1
[PATCH v3] clk: Restore BYPASS_PLL_CHECK from PLLs
I have looked at problem with Fermi GPUs where changing to higher clock led to really bad perfomance (with GpuTest 20x worse perfomance) and later also crashes of the nouveau. It seemed to be affected by Shader Clock in Voltage Entries in the video BIOS. Disabling BYPASS_PLL_CHECK in CLK0_CTRL seems to completely fix the issue. I have tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it wasn'...
2019 Sep 04
0
[RFC PATCH] clk: Remove BYPASS_PLL_CHECK from PLLs
I have looked at problem with Fermi GPUs where changing to higher clock led to really bad perfomance (with GpuTest 20x worse perfomance) and later also crashes of the nouveau. It seemed to be affected by Shader Clock in Voltage Entries in the video BIOS. Disabling BYPASS_PLL_CHECK in CLK0_CTRL seems to completely fix the issue. I have tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it wasn'...
2023 May 09
0
6.2 still cannot get hdmi display out on Thinkpad P73 Quadro RTX 4000 Mobile/TU104
...ave not done in your > past efforts and what those results were, my diagnostic approach would > start by verifying that the HW (chip) is not damaged by previous > experiments or from the get go. Here's a link to a python gpu test app. > Hope that helps. > https://www.geeks3d.com/gputest/download/ Sure, although for now, it of course runs on my main GPU, the intel one, so that does not help much. > First things, is to prove the chip works, then that target delivery > (cables etc.) works then reduce down to your desired working setup. > Lastly and I'm sure that you a...
2019 Sep 09
0
[PATCH v4] clk: Restore BYPASS_PLL_CHECK from PLLs
I have looked at problem with Fermi GPUs where changing to higher clock led to really bad perfomance (with GpuTest 20x worse perfomance) and later also crashes of the nouveau. It seemed to be affected by Shader Clock in Voltage Entries in the video BIOS. Disabling BYPASS_PLL_CHECK in CLK0_CTRL seems to completely fix the issue. I have tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it wasn'...
2017 Mar 26
5
[PATCH v5 0/5] nvc0/ir: add support for MAD/FMA PostRALoadPropagation
was "nv50/ir: PostRaConstantFolding improvements" before. nothing really changed from the last version, just minor things. Karol Herbst (5): nv50/ir: restructure and rename postraconstantfolding pass nv50/ir: implement mad post ra folding for nvc0+ gk110/ir: add LIMM form of mad gm107/ir: add LIMM form of mad nv50/ir: also do PostRaLoadPropagation for FMA