Displaying 2 results from an estimated 2 matches for "gprsp".
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gprs
2014 Jun 20
3
[LLVMdev] Passing specific register for an Instruction in target description files.
Hi all,
I want to generate an assembly instruction for my target using target
description representation of the instruction. The problem is that I want to
add direct register to be chose as an output register for my target. Does it
possible to do with an instruction definition in TARGETInstrInfo.td file?
May be someone could help with an example?
Currently I have seen that we can pass the name
2014 Jul 02
2
[LLVMdev] Passing specific register for an Instruction in target description files.
...d use it in the td file.
> E.g., in yourTargetRegisterInfo.td:
> def MyReg : RegisterClass<“MyTarget”, [Related Types], MySize, (add MyReg)>;
>
> in yourTargetInstrInfo.td:
> def MyInstr […] (outs MyReg:$Rd) […]
>
> The ARM target does something similar for SP. Look for GPRsp.
>
If you use this approach, you may run into issues if the scheduler decides
to put two instructions that write to this register class in a row. In this
case you will either need to implement spilling or the register allocator will
run out of registers.
The other way to solves this is to us...