Displaying 1 result from an estimated 1 matches for "gprpairregclass".
2013 Jun 25
2
[LLVMdev] Adding a new ARM RegisterClass
I'm looking at an issue where we want a particular pseudo-instruction to
choose from a set of registers that is not included in the existing set of
RegisterClass definitions. More concretely, there is a RegisterClass in
ARMRegisterInfo.td defined as
def rGPR : RegisterClass<"ARM", [i32], 32, (sub GPR, SP, PC)> {
let AltOrders = [(add LR, rGPR), (trunc rGPR, 8)];
let