Displaying 1 result from an estimated 1 matches for "gpr_hl".
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gpr_b
2013 Feb 02
1
[LLVMdev] Trouble with instructions for lowering load/store.
Hello.
I write backend for Z80 cpu and I have some trouble with lowering
load/store nodes to different machine opcodes. Some target instructions
work with specified registers (not all registers in RegisterClass).
Often it's one or two registers. I don't understand how use
ComplexPattern in this case. But if I don't use ComplexPattern I'll have
other problems - not all