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...sts.llvm.org> wrote: > > I have one more question regarding expanding pseudo instruction. > > These two Machine Instructions, which I mentioned earlier, have to be one after another, but also have to 'communicate' using any General Purpose Register > > For example: > gpr4 INST_IN > r2 INST_OUT gpr4, r1 > > Is there any possibility to indicate that pseudo instruction, which is representing these two instruction, > will define and use 'internally' one additional register from 'gpr' pool (except those which are ins and outs). > Aa 'in...

Hi, for DAG-to-DAG instruction selection I’ve implemented a pattern, which creates from one SDNode two instructions, something like: def: Pat<(NEW_SDNODE REG:$r1), (INST_OUT (INST_IN), REG:$r1)>; where INST_IN doesn't accepts any inputs and INST_OUT accepts two inputs - one returned by INST_IN and REG;$r1. Is there any possibility to ‘Glue’ two instruction created