Displaying 1 result from an estimated 1 matches for "gpr32regclass".
2014 Jun 08
2
[LLVMdev] [llvm] r210424 - Revert "Do materialize for floating point"
...MVT VT) {
> - int64_t Imm = CFP->getValueAPF().bitcastToAPInt().getZExtValue();
> - if (VT == MVT::f32) {
> - const TargetRegisterClass *RC = &Mips::FGR32RegClass;
> - unsigned DestReg = createResultReg(RC);
> - unsigned TempReg = Materialize32BitInt(Imm, &Mips::GPR32RegClass);
> - EmitInst(Mips::MTC1, DestReg).addReg(TempReg);
> - return DestReg;
> - } else if (VT == MVT::f64) {
> - const TargetRegisterClass *RC = &Mips::AFGR64RegClass;
> - unsigned DestReg = createResultReg(RC);
> - unsigned TempReg1 = Materialize32BitInt(Imm >...