Displaying 4 results from an estimated 4 matches for "gpr1".
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gpr
2008 Sep 10
2
[LLVMdev] Custom Lowering and fneg
...[(set GPR:$dst, (fneg GPR:$src0))]>;
With GPR defined as either an i32 or an f32.
On another not, is there any known examples of using Tablegen with a
typeless register class? Or with instruction formats where the modifiers
are on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg,
GPR2_abs, which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)?
Thanks,
Micah Villmow
Systems Engineer
Advanced Technology & Performance
Advanced Micro Devices Inc.
4555 Great America Pkwy,
Santa Clara, CA. 95054
P: 408-572-6219
F: 408-572-6596
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2008 Sep 10
0
[LLVMdev] Custom Lowering and fneg
...fneg with an i32 result, something is already messed up.
> On another not, is there any known examples of using Tablegen with a
> typeless register class?
What do you mean?
> Or with instruction formats where the modifiers are
> on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg, GPR2_abs,
> which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)?
No examples I know of, but I don't think there should be any issues
using multiclass, as long as there aren't too many possible modifiers;
see http://llvm.org/docs/TableGenFundamentals.html and various uses in
the cod...
2008 Sep 10
3
[LLVMdev] Custom Lowering and fneg
...t register is needed, then I just use 2 sequential 128bit
registers. Also, my instruction set has basically unlimited registers, I
can't really seem a way to model this either.
> Or with instruction formats where the modifiers are
> on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg,
GPR2_abs,
> which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)?
No examples I know of, but I don't think there should be any issues
using multiclass, as long as there aren't too many possible modifiers;
see http://llvm.org/docs/TableGenFundamentals.html and various uses in
the cod...
2008 Sep 16
0
[LLVMdev] Custom Lowering and fneg
...t register is needed, then I just use 2 sequential 128bit
registers. Also, my instruction set has basically unlimited registers, I
can't really seem a way to model this either.
> Or with instruction formats where the modifiers are
> on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg,
GPR2_abs,
> which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)?
No examples I know of, but I don't think there should be any issues
using multiclass, as long as there aren't too many possible modifiers;
see http://llvm.org/docs/TableGenFundamentals.html and various uses in
the cod...