search for: gpr0

...[(set GPR:$dst, (fneg GPR:$src0))]>; With GPR defined as either an i32 or an f32. On another not, is there any known examples of using Tablegen with a typeless register class? Or with instruction formats where the modifiers are on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg, GPR2_abs, which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)? Thanks, Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next p...

...ve an fneg with an i32 result, something is already messed up. > On another not, is there any known examples of using Tablegen with a > typeless register class? What do you mean? > Or with instruction formats where the modifiers are > on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg, GPR2_abs, > which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)? No examples I know of, but I don't think there should be any issues using multiclass, as long as there aren't too many possible modifiers; see http://llvm.org/docs/TableGenFundamentals.html and various uses in t...

...*must* be used for the branch destination > out of the ASM trampoline. R0 ends up getting used a lot for constant > loads; we can (and in fact must) use it as a scratch register, but we > cannot rely on it surviving past the prologue of the target function. Hm. I can't guarantee that GPR0 won't be used by any prologue, but I don't recall ever seeing such usage on Darwin. >> AFAIK, the OS X dynamic linker does not "own" any registers. Here >> are >> some links to the Darwin ABI... > > In SVR4 ABI, R11 and R12 can be used. In Darwin, the...

...256bit register is needed, then I just use 2 sequential 128bit registers. Also, my instruction set has basically unlimited registers, I can't really seem a way to model this either. > Or with instruction formats where the modifiers are > on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg, GPR2_abs, > which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)? No examples I know of, but I don't think there should be any issues using multiclass, as long as there aren't too many possible modifiers; see http://llvm.org/docs/TableGenFundamentals.html and various uses in t...

...256bit register is needed, then I just use 2 sequential 128bit registers. Also, my instruction set has basically unlimited registers, I can't really seem a way to model this either. > Or with instruction formats where the modifiers are > on the registers and the instructions(i.e. mul_x2 GPR0, GPR1_neg, GPR2_abs, > which is equivalent to GPR0 = (-GPR1 * abs(GPR2)*2)? No examples I know of, but I don't think there should be any issues using multiclass, as long as there aren't too many possible modifiers; see http://llvm.org/docs/TableGenFundamentals.html and various uses in t...