search for: gpccs_sig

Displaying 10 results from an estimated 10 matches for "gpccs_sig".

2016 Feb 23
2
[GIT,PULL] Signed firmware for NVIDIA Maxwell 2 GPUs
...t.bin | Bin 0 -> 16271 bytes nvidia/gm200/gr/fecs_sig.bin | Bin 0 -> 76 bytes nvidia/gm200/gr/gpccs_bl.bin | Bin 0 -> 576 bytes nvidia/gm200/gr/gpccs_data.bin | Bin 0 -> 2056 bytes nvidia/gm200/gr/gpccs_inst.bin | Bin 0 -> 9768 bytes nvidia/gm200/gr/gpccs_sig.bin | Bin 0 -> 76 bytes nvidia/gm200/gr/sw_bundle_init.bin | Bin 0 -> 7616 bytes nvidia/gm200/gr/sw_ctx.bin | Bin 0 -> 5592 bytes nvidia/gm200/gr/sw_method_init.bin | Bin 0 -> 10800 bytes nvidia/gm200/gr/sw_nonctx.bin | Bin 0 -> 1440 bytes nvidia/gm204/acr...
2016 Jul 09
1
[GIT,PULL] Signed firmware for NVIDIA GP100 GPU
...100/gr/fecs_inst.bin | Bin 0 -> 20955 bytes nvidia/gp100/gr/fecs_sig.bin | Bin 0 -> 76 bytes nvidia/gp100/gr/gpccs_bl.bin | 1 + nvidia/gp100/gr/gpccs_data.bin | Bin 0 -> 2080 bytes nvidia/gp100/gr/gpccs_inst.bin | Bin 0 -> 12458 bytes nvidia/gp100/gr/gpccs_sig.bin | Bin 0 -> 76 bytes nvidia/gp100/gr/sw_bundle_init.bin | Bin 0 -> 7664 bytes nvidia/gp100/gr/sw_ctx.bin | Bin 0 -> 6240 bytes nvidia/gp100/gr/sw_method_init.bin | Bin 0 -> 11928 bytes nvidia/gp100/gr/sw_nonctx.bin | Bin 0 -> 2248 bytes 16 files changed...
2020 Apr 30
1
gp104: regression on Linux 5.6
...x.bin nvidia/gp104/gr/sw_bundle_init.bin nvidia/gp104/gr/sw_method_init.bin nvidia/gp104/gr/fecs_bl.bin nvidia/gp104/gr/fecs_inst.bin nvidia/gp104/gr/fecs_data.bin nvidia/gp104/gr/fecs_sig.bin nvidia/gp104/gr/gpccs_bl.bin nvidia/gp104/gr/gpccs_inst.bin nvidia/gp104/gr/gpccs_data.bin nvidia/gp104/gr/gpccs_sig.bin nvidia/gp104/sec2/image.bin nvidia/gp104/sec2/desc.bin nvidia/gp104/sec2/sig.bin nvidia/gp104/acr/ucode_load.bin nvidia/gp104/acr/ucode_unload.bin nvidia/gp104/acr/bl.bin nvidia/gp104/acr/unload_bl.bin nvidia/gp104/nvdec/scrubber.bin" > > Bisecting is kinda painful with miscompilati...
2020 Apr 01
2
gp104: regression on Linux 5.6
gp104 refuses to switch to "graphic" mode and show anything past this line: fb0: switching to nouveaufb from EFI VGA Machine is fine, as it I can press Ctrl+Alt+Delete and reboot it normally. 5.5 is OK. 5.6 is broken. Bisecting is kinda painful with miscompilation and init/main.c breakage. BTW do I need all those megabytes of firmware? [ 0.923273] fb0: switching to nouveaufb
2017 Apr 04
47
[Bug 100567] New: Nouveau system freeze fifo: SCHED_ERROR 0a [CTXSW_TIMEOUT]
https://bugs.freedesktop.org/show_bug.cgi?id=100567 Bug ID: 100567 Summary: Nouveau system freeze fifo: SCHED_ERROR 0a [CTXSW_TIMEOUT] Product: xorg Version: unspecified Hardware: Other OS: All Status: NEW Severity: normal Priority: medium Component: Driver/nouveau
2016 Feb 24
0
[PATCH v3 10/11] secboot/gm200: add secure-boot support
...data.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/fecs_sig.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/gpccs_bl.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/gpccs_inst.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/gpccs_data.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/gpccs_sig.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/sw_ctx.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/sw_nonctx.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/sw_bundle_init.bin"); +MODULE_FIRMWARE("nvidia/gm200/gr/sw_method_init.bin"); + +MODULE_FIRMWARE("nvidia/gm20...
2016 Oct 11
10
[PATCH 0/8] Secure Boot refactoring
Hi everyone, Apologies for the big patchset. This is a rework of the secure boot code that moves the building of the blob into its own set of source files (and own hooks), making the code more flexible and (hopefully) easier to understand as well. This rework is needed to support more signed firmware for existing and new chips. Since the firmwares in question are not available yet I cannot send
2017 Jul 23
19
[Bug 101887] New: gtx 970 black screen
https://bugs.freedesktop.org/show_bug.cgi?id=101887 Bug ID: 101887 Summary: gtx 970 black screen Product: xorg Version: unspecified Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Priority: medium Component: Driver/nouveau Assignee: nouveau at
2016 Feb 24
11
[PATCH v3 00/11] nouveau: add secure boot support for dGPU and Tegra
New version of the secure boot code that works with the blobs just merged into linux-firmware. Since the required Mesa patches are also merged, this set is the last piece of the puzzle to get out-of-the-box accelerated Maxwell 2. The basic code remains the same, with a few improvements with respect to how secure falcons are started. Hopefully the patchset is better split too. I have a
2017 Mar 29
15
[PATCH 00/15] Support for GP10B chipset
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot: