Displaying 10 results from an estimated 10 matches for "gpc_max".
2014 Jun 07
0
[RFC PATCH] drm/gk208/gr: adjust a couple of init values
...m/nouveau/core/engine/graph/ctxnv108.c
index 8de4a42..b0bc5db 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
@@ -537,6 +537,7 @@ nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
u32 magic[GPC_MAX][2];
u32 offset;
int gpc;
+ u32 r17e91c, r17e920;
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
@@ -571,8 +572,10 @@ nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)...
2014 Mar 24
0
[PATCH 10/12] drm/nouveau/graph: add GK20A support
...860d 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
@@ -804,7 +804,7 @@ nve4_grctx_init_unk[] = {
{}
};
-static void
+void
nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
u32 magic[GPC_MAX][2];
@@ -962,7 +962,7 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
nv_mask(priv, 0x41be10, 0x00800000, 0x00800000);
}
-static struct nvc0_graph_init *
+struct nvc0_graph_init *
nve4_grctx_init_hub[] = {
nvc0_grctx_init_base,
nve4_grctx_init_unk40xx,
d...
2014 Mar 26
2
[PATCH 10/12] drm/nouveau/graph: add GK20A support
...ctxnve4.c
> +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
> @@ -804,7 +804,7 @@ nve4_grctx_init_unk[] = {
> {}
> };
>
> -static void
> +void
> nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
> {
> u32 magic[GPC_MAX][2];
> @@ -962,7 +962,7 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
> nv_mask(priv, 0x41be10, 0x00800000, 0x00800000);
> }
>
> -static struct nvc0_graph_init *
> +struct nvc0_graph_init *
> nve4_grctx_init_hub[] = {
>...
2014 Mar 24
27
[PATCH 00/12] drm/nouveau: support for GK20A, cont'd
Hi everyone,
Here is the second batch of patches to add GK20A support to Nouveau. This time
we are adding the actual chip support, and this series brings the driver to a
point where a slightly-tweaked Mesa successfully runs shaders and renders
triangles on GBM! Many thanks to Thierry Reding and the people on the
#nouveau IRC channel for their help without which we would not have reached
this
2014 May 02
10
[PATCH v4 0/9] drm/nouveau: support for GK20A, cont'd
Latest patches for GK20A, taking comments received for v3 into account.
Changes since v3:
- use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions
are present on every arch and the physical address to page frame number
conversion is also consistently a shift of PAGE_SHIFT. This part will
probably be replaced by something nicer in the future anyway.
- fixed a warning on
2014 Apr 21
13
[PATCH v2 00/10] drm/nouveau: support for GK20A, cont'd
Hi everyone,
Way overdue v2 of the final patches that enable basic GK20A support. Hopefully
all the issues raised with v1 have been addressed.
Changes since v1:
- Use gk20a clock driver by Ben instead of twiddling nv04's
- Name new classes after gk20a instead of nvea
- Addressed comments about BAR initialization code factorization
- Removed non-essential code which only purpose was to avoid
2015 Jun 23
8
[PATCH v2 0/6] Improve GK20A support, introduce GM20B, firmware paths
Second version of this patchset. Not many changes since first version - I hope
this means the changes are not too controversial.
Changes since v1:
- Removed lookup for previous FW files in "nouveau/"
- Went back to using request_firmware() since we only try to load one file
Original cover letter follows:
GM20B is the GPU of the upcoming Tegra X1 SoC. This series adds initial support
2015 Jun 18
8
[PATCH 0/6] Improve GK20A and introduce GM20B support
Hello everyone,
GM20B is the GPU of the upcoming Tegra X1 SoC. This series adds initial support
for it, based on a rework of the already-supported GK20A. It also introduces
support for NVIDIA-provided firmware files, which is why I have added a few
NVIDIA people who are relevant to this discussion.
The first patch adds support for loading the FECS and GPCCS firmwares from
firmware files
2014 Apr 25
12
[PATCH v3 0/9] drm/nouveau: support for GK20A, cont'd
Changes since v2:
- Enabled software class
- Removed unneeded changes to nouveau_accel_init()
- Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with
the portable page_to_phys()/phys_to_page()
- Fixed incorrect comment/commit log talking about bytes instead of words
Hope this looks good! Once this gets merged the next set will be to use this
driver on Jetson and Venice2
2016 Dec 13
15
[PATCH v2 0/15] Falcon library
This was the first step of the secure boot refactoring - as Ben asked for some
fixes, I now submit it as its own series to make it easier to review (and also
because rebasing secure boot on top of this takes time and I don't want to do
it until this is validated!).
This series attempts to factorize the duplicate falcon-related code into a
single library, using the existing nvkm_falcon