Displaying 2 results from an estimated 2 matches for "gp100_gr_init_rop_active_fbps".
2017 Mar 29
0
[PATCH 12/15] gr: support for GP10B
...*);
+
+void gp100_gr_init_num_active_ltcs(struct gf100_gr *gr);
+
#endif
diff --git a/drm/nouveau/nvkm/engine/gr/gp100.c b/drm/nouveau/nvkm/engine/gr/gp100.c
index 94ed7debb714..867a5f7cc5bc 100644
--- a/drm/nouveau/nvkm/engine/gr/gp100.c
+++ b/drm/nouveau/nvkm/engine/gr/gp100.c
@@ -40,6 +40,15 @@ gp100_gr_init_rop_active_fbps(struct gf100_gr *gr)
nvkm_mask(device, 0x408958, 0x0000000f, fbp_count); /* crop */
}
+void
+gp100_gr_init_num_active_ltcs(struct gf100_gr *gr)
+{
+ struct nvkm_device *device = gr->base.engine.subdev.device;
+
+ nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));
+ nvkm_wr32...
2017 Mar 29
15
[PATCH 00/15] Support for GP10B chipset
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for
its base engines after reworking secboot a bit to accomodate its calling
convention better.
This patchset has been tested rendering simple off-screen buffers using Mesa
and yielded the expected result.
Alexandre Courbot (15):
secboot: allow to boot multiple falcons
secboot: pass instance to LS firmware loaders
secboot: