search for: got16

...lld :: elf/Mips/exe-dynamic.test lld :: elf/Mips/exe-dynsym.test lld :: elf/Mips/exe-fileheader-64.test lld :: elf/Mips/exe-fileheader-micro-64.test lld :: elf/Mips/exe-fileheader-n32.test lld :: elf/Mips/exe-got-micro.test lld :: elf/Mips/exe-got.test lld :: elf/Mips/got16-2.test lld :: elf/Mips/got16-micro.test lld :: elf/Mips/got-page-32-micro.test lld :: elf/Mips/got-page-64-micro.test lld :: elf/Mips/got-page-64.test lld :: elf/X86_64/sectionchoice.test lld :: elf/X86_64/sectionmap.test lld :: mach-o/arm-interworking.yaml lld :: ma...

...:: elf/Mips/exe-dynamic.test > lld :: elf/Mips/exe-dynsym.test > lld :: elf/Mips/exe-fileheader-64.test > lld :: elf/Mips/exe-fileheader-micro-64.test > lld :: elf/Mips/exe-fileheader-n32.test > lld :: elf/Mips/exe-got-micro.test > lld :: elf/Mips/exe-got.test > lld :: elf/Mips/got16-2.test > lld :: elf/Mips/got16-micro.test > lld :: elf/Mips/got-page-32-micro.test > lld :: elf/Mips/got-page-64-micro.test > lld :: elf/Mips/got-page-64.test > lld :: elf/X86_64/sectionchoice.test > lld :: elf/X86_64/sectionmap.test > lld :: mach-o/arm-interworking.yaml > l...

...s/exe-dynsym.test >> lld :: elf/Mips/exe-fileheader-64.test >> lld :: elf/Mips/exe-fileheader-micro-64.test >> lld :: elf/Mips/exe-fileheader-n32.test >> lld :: elf/Mips/exe-got-micro.test >> lld :: elf/Mips/exe-got.test >> lld :: elf/Mips/got16-2.test >> lld :: elf/Mips/got16-micro.test >> lld :: elf/Mips/got-page-32-micro.test >> lld :: elf/Mips/got-page-64-micro.test >> lld :: elf/Mips/got-page-64.test >> lld :: elf/X86_64/sectionchoice.test >> lld :: elf/X86_64/sectionmap.test...

Hi Jim, Yes, the relocation entries have to be reordered so that the got16/lo16 or hi16/lo16 pairs appear consecutively in the relocation table. As a result, relocations can appear in a different order than the instructions that they're for. For example, in this code, the post-RA scheduler inserts an instruction with relocation %got(body_ok) between %got(scope_top) a...

Hi Rui, et al., I was experimenting yesterday with building lld on my POWER7 PPC64/Linux machine, and ran into an unfortunate problem. When running the regressions tests under lit, almost all of the tests fail like this: terminate called after throwing an instance of 'std::system_error' what(): Resource temporarily unavailable ... 5 libc.so.6 0x00000080b7847238 abort +

Here is the patch. On Thu, Mar 22, 2012 at 11:11 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Hi Jim, > > Yes, the relocation entries have to be reordered so that the > got16/lo16 or hi16/lo16 pairs appear consecutively in the relocation > table. As a result, relocations can appear in a different order than > the instructions that they're for. > > For example, in this code, the post-RA scheduler inserts an > instruction with relocation %got(body_ok) b...

...2012, at 11:13 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Here is the patch. > > On Thu, Mar 22, 2012 at 11:11 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: >> Hi Jim, >> >> Yes, the relocation entries have to be reordered so that the >> got16/lo16 or hi16/lo16 pairs appear consecutively in the relocation >> table. As a result, relocations can appear in a different order than >> the instructions that they're for. >> >> For example, in this code, the post-RA scheduler inserts an >> instruction with reloc...

...t would be the best way to sort relocation entries before they are > written out in ELFObjectWriter::WriteRelocationsFragment? > > According to the Mips ABI documents I have, there are certain > restrictions on the order relocations appear in the table (e.g. > R_MIPS_HI16 and R_MIPS_GOT16 must be followed immediately by a > R_MIPS_LO16). When I enable post RA scheduling, some of the > restrictions are violated in the generated object code, which results > in incorrect relocation values generated by the linker. > > I am considering imitating what gas does in function...

What would be the best way to sort relocation entries before they are written out in ELFObjectWriter::WriteRelocationsFragment? According to the Mips ABI documents I have, there are certain restrictions on the order relocations appear in the table (e.g. R_MIPS_HI16 and R_MIPS_GOT16 must be followed immediately by a R_MIPS_LO16). When I enable post RA scheduling, some of the restrictions are violated in the generated object code, which results in incorrect relocation values generated by the linker. I am considering imitating what gas does in function mips_frob_file (line 1552...

...naka <ahatanak at gmail.com> wrote: > >> Here is the patch. >> >> On Thu, Mar 22, 2012 at 11:11 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: >>> Hi Jim, >>> >>> Yes, the relocation entries have to be reordered so that the >>> got16/lo16 or hi16/lo16 pairs appear consecutively in the relocation >>> table. As a result, relocations can appear in a different order than >>> the instructions that they're for. >>> >>> For example, in this code, the post-RA scheduler inserts an >>> ins...

...wrote: >> >>> Here is the patch. >>> >>> On Thu, Mar 22, 2012 at 11:11 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: >>>> Hi Jim, >>>> >>>> Yes, the relocation entries have to be reordered so that the >>>> got16/lo16 or hi16/lo16 pairs appear consecutively in the relocation >>>> table. As a result, relocations can appear in a different order than >>>> the instructions that they're for. >>>> >>>> For example, in this code, the post-RA scheduler inserts an...