Displaying 2 results from an estimated 2 matches for "gm200_gr_rops".
Did you mean:
gf100_gr_rops
2017 Mar 29
0
[PATCH 12/15] gr: support for GP10B
...gr);
if (gr->func->init_swdx_pes_mask)
@@ -154,6 +162,7 @@ gp100_gr = {
.init_gpc_mmu = gm200_gr_init_gpc_mmu,
.init_rop_active_fbps = gp100_gr_init_rop_active_fbps,
.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
+ .init_num_active_ltcs = gp100_gr_init_num_active_ltcs,
.rops = gm200_gr_rops,
.ppc_nr = 2,
.grctx = &gp100_grctx,
diff --git a/drm/nouveau/nvkm/engine/gr/gp102.c b/drm/nouveau/nvkm/engine/gr/gp102.c
index 1d5117a16299..109fda8eb124 100644
--- a/drm/nouveau/nvkm/engine/gr/gp102.c
+++ b/drm/nouveau/nvkm/engine/gr/gp102.c
@@ -47,6 +47,7 @@ gp102_gr = {
.init_rop_acti...
2017 Mar 29
15
[PATCH 00/15] Support for GP10B chipset
GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for
its base engines after reworking secboot a bit to accomodate its calling
convention better.
This patchset has been tested rendering simple off-screen buffers using Mesa
and yielded the expected result.
Alexandre Courbot (15):
secboot: allow to boot multiple falcons
secboot: pass instance to LS firmware loaders
secboot: