search for: globalisel

Hi all, Now, four backends (if I am counting right: X86, ARM, AArch64, AMDGPU) are working on bringing-up GlobalISel, I’d like to switch the default of the LLVM_BUILD_GLOBAL_ISEL variable in CMake, such that the framework gets built by default. ** Impact of Flipping the Switch ** * Upsides * For people developing on GlobalISel, it will: - Simplify the CMake command to type :) - Build/Test GlobalISel on all the...

Hi Michael, > On Jan 13, 2017, at 6:38 PM, Michael Kuperstein <mkuper at google.com> wrote: > > As a person not developing on GlobalISel, I can already play with it by setting the flag. ;-) > > The main (and huge) benefit I see is that it will get tested by default. I agree. > So, I think it's mainly a question of maturity - if my (non-GlobalISel) change breaks GlobalISel, how likely is it to be a bug in my code vs....

Hi, I would like to get rid of the logic around disabling GlobalISel from the build. *** Context *** So far, GlobalISel has been this framework built up on the side for about two years. Now, we are close to a point where having it being optional impedes our ability to implement the right things. For instance, checks that would fit naturally in the MachineVerifier...

Hi! So far, GlobalISel only supports very basic inline assembler constructs (no input/output operands, only simple memory clobbers). In [0], I'm adding support for generic register, immediate, memory and clobber constraints. The code is more or less a direct port from the handling in SelectionDAGBuilder. Before...

...:57 AM, Renato Golin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > On 14 January 2017 at 01:54, Quentin Colombet via llvm-dev > <llvm-dev at lists.llvm.org> wrote: >> Now, four backends (if I am counting right: X86, ARM, AArch64, AMDGPU) are working on bringing-up GlobalISel, I’d like to switch the default of the LLVM_BUILD_GLOBAL_ISEL variable in CMake, such that the framework gets built by default. > > Hi Quentin, > > I'm not extremely confident in a full switch right now, mainly due to > Michael's concerns. The ARM port is in its initial sta...

...rrent_address=0x402cf4 or 0x402cf0 ^ I bisected the control_tool.c failure to: 3834f852008a82e361d325ec7b1c3fee0dc783c3 is the first bad commit commit 3834f852008a82e361d325ec7b1c3fee0dc783c3 Author: Petr Pavlu <petr.pavlu at arm.com> Date: Thu Nov 29 12:56:32 2018 +0000 [GlobalISel] Make EnableGlobalISel always set when GISel is enabled Change meaning of TargetOptions::EnableGlobalISel. The flag was previously set only when a target switched on GlobalISel but it is now always set when the GlobalISel pipeline is enabled. This makes the flag consistent with...

...pected all of them to pass if blockaddress works. I'll try to look at some asm and see what's going on. -David Jonas Hahnfeld <hahnjo at hahnjo.de> writes: > Hi David, > > I was the one who originally added the flag to fix failures related to > GlobalISel. This was because first versions of GlobalISel didn't know > how to select 'blockaddress', but this should have been fixed (see > https://bugs.llvm.org/show_bug.cgi?id=36390) and available in both 7.0 > and trunk. > There has been some discussion prior to that in > https:...

Hi, GlobalISel, the SelectionDAG replacement, has come a long way since initially discussed on the mailing list and its last discussion at the EuroLLVM BoF (https://etherpad.net/p/GlobalISel <https://etherpad.net/p/GlobalISel>). We believe we are close to the point of enabling it by default on AArch64 at O0...

Looking through the X86 GlobalISEL code for selecting loads and stores, I'm not seeing the creation of the MachineMemOperands I'd expect to see and do see being generated by SelectionDAG.  Is this simply an oversight, or is there some aspect of the new design which pushes us away from MMOs? Various parts of the machine...

Hi, I would like to start a new porting of GlobalIsel for RISCV. An initial patch about GlobalIsel infrastructure for RISCV was ready now: https://reviews.llvm.org/D65219 There is another porting patch https://reviews.llvm.org/D41653 posted by Leslie Zhai at the end of 2017. I have checked with Leslie about the status of this patch.He has stopped de...

Hi All, I've been working on some documentation changes for GlobalISel and it looks like they aren't being reflected on llvm.org <http://llvm.org/>. In particular, the change I landed on the 25th Oct (https://github.com/llvm/llvm-project/commit/feab0334f57d) hasn't appeared yet. This commit changed the 'Global Instruction Selection' link at https...

...ee some). On geomean, I see 13% slow down (down from 17% on my previous run). On geomean, code size increase is about 3% (down from 11% on my previous run). I also checked debug info quality with the DIVA tool on the test-suite; and asked one of our DS-5 validation guys to test debug experience for GlobalISel in combination with the ARM DS-5 Development Studio<https://developer.arm.com/products/software-development-tools/ds-5-development-studio> debugger. Both of us didn't find any issues with the debug info produced at -O0 -g with GlobalISel. I didn't check compile time, nor do I intend t...

> On Jan 19, 2017, at 11:59 AM, Quentin Colombet <qcolombet at apple.com> wrote: > > Hi all, > > Trying to summarize the concerns along side my answers but I believe we are good to do the switch to build GlobalISel by default. In particular, Renato and I exchanged offline and he tried doing the switch on some of the bots he maintained and did not see any overhead/problem for that. > Let me know if you disagree. > > > * What is the impact on compile time? > > Negligible: ~5s for a 19min bu...

On Wed, Jan 18, 2017 at 9:13 AM David Blaikie via llvm-dev < llvm-dev at lists.llvm.org> wrote: > These concerns sound applicable to the situation when GlobalISel is turned > on by default and has an effect on code generation. > > While it's a library with tests like any other LLVM component I don't see > these concerns as being significantly greater risk than any other library > in LLVM. > > I'm honestly surprised GlobalISel...

...ee 13% slow down (down from 17% on my previous run). > On geomean, code size increase is about 3% (down from 11% on my previous > run). > I also checked debug info quality with the DIVA tool on the test-suite; > and asked one of our DS-5 validation guys to test debug experience for > GlobalISel in combination with the ARM DS-5 Development Studio > <https://developer.arm.com/products/software-development-tools/ds-5-development-studio> debugger. > Both of us didn't find any issues with the debug info produced at -O0 -g > with GlobalISel. > I didn't check compile ti...

Hi, I am in the process of porting our target to GlobalISel, and have encountered a problem. Nearly all instructions in our instruction set make modifications to a CC register, and hence are defined as follows: let ..., Defs = [CCReg] in def shfts_a32_imm7: Instruction<(outs OurRC:$dst), ...>; What's more, many of these instructions have pa...

Hi llvm-dev, I am currently writing a backend for an architecture I am designing in my bachelor's thesis and recently came across the GlobalISel Selection Framework. Should already start using this over the more common Selection DAG? Being new llvm backend development, I am not sure if GlobalISel would be "easier" to implement than ISelDAG and if there is any decent documentation on how to do so. Cheers, Floris -------------- nex...

...an, I see 13% slow down (down from 17% on my previous run). >> On geomean, code size increase is about 3% (down from 11% on my previous run). >> I also checked debug info quality with the DIVA tool on the test-suite; and asked one of our DS-5 validation guys to test debug experience for GlobalISel in combination with the ARM DS-5 Development Studio <https://developer.arm.com/products/software-development-tools/ds-5-development-studio> debugger. Both of us didn't find any issues with the debug info produced at -O0 -g with GlobalISel. >> I didn't check compile time, nor do...

...lot of the biggest regressions are caused by unnecessarily moving floating point values through general purpose registers. I've raised http://bugs.llvm.org/show_bug.cgi?id=32550 <http://bugs.llvm.org/show_bug.cgi?id=32550> for this. I think this one definitely needs fixing before enabling GlobalISel by default at -O0. >> >> I commented in the PR. This is a known problem and we have a solution. Given this is an optimization in the sense that it does not affect the correctness of the program, we didn’t push for fixing it now. >> >> For O0 we wanted to focus ourselves on...

Hi all, After a recent upstream merge into our downstream sources we are suddenly encountering the freeze instruction in LLVM IR for div/rem pairs. This seems to be related to [1]. Our downstream target is GlobalISel only and unfortunately GlobalISel doesn't support this instruction yet, so most of our internal test-suite is now breaking due to GlobalISel not being able to translate this instruction to MIR. We would like to add support for that, but it seems that it is not yet clear how this freeze inst...