search for: gk20a_timer_oclass

...device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; > + device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; > + device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; As per note on the PTIMER patch, can just switch this to "gk20a_timer_oclass" on the latest code. > + device->oclass[NVDEV_SUBDEV_FB ] = nvea_fb_oclass; > + device->oclass[NVDEV_SUBDEV_IBUS ] = &nvea_ibus_oclass; > + device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; > + d...

...ine/device/nve0.c index 54ec53bc6252..cdf9147f32a1 100644 --- a/nvkm/engine/device/nve0.c +++ b/nvkm/engine/device/nve0.c @@ -163,6 +163,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass; + device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_VM...

...t;oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; + device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass; + device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; + device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass; + device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; + device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass; + device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; + device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; + device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; + device->oclass[NVDEV_SUBDEV_M...

...BDEV_CLOCK ] = >> &gk20a_clock_oclass; >> device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; >> device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; >> device->oclass[NVDEV_SUBDEV_TIMER ] = >> &gk20a_timer_oclass; >> diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h >> b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h >> index c0fe191c9787..9fed2834f25e 100644 >> --- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h >> +++ b/drivers/gpu/drm/nouveau/core/i...

...->cname = "GK20A"; > + device->oclass[NVDEV_SUBDEV_CLOCK ] = &gk20a_clock_oclass; > device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; > device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; > device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; > diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h > index c0fe191c9787..9fed2834f25e 100644 > --- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h > +++ b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h &gt...

...case 0xea: device->cname = "GK20A"; + device->oclass[NVDEV_SUBDEV_CLOCK ] = &gk20a_clock_oclass; device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h index c0fe191c9787..9fed2834f25e 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h @@ -138,6 +138,7 @@ ext...

...K ] = &gk20a_clock_oclass; > device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; > device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; > + device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; > device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; > device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass; > device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; > @@ -180,6 +185,7 @@ nve0_identify(struct nouveau_device *device) > device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; > dev...

...class[NVDEV_SUBDEV_CLOCK ] = &gk20a_clock_oclass; device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; + device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; @@ -180,6 +185,7 @@ nve0_identify(struct nouveau_device *device) device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; device->oclass[NVDEV_SUBDEV_G...

This series adds support for reclocking on GK20A. The first two patches touch the clock subsystem to allow GK20A to operate, by making the presence of the thermal and voltage devices optional, and allowing pstates to be provided directly instead of being probed using the BIOS (which Tegra does not have). The last patch adds the GK20A clock device. Arguably the clock can be seen as a stripped-down

Second version of the gk20a clock patches. I have tried to keep the therm and volt devices mandatory in the clock driver, but unfortunately they are too tied to bios to allow this, at least for the moment. Consequently this version is mostly a port of the first version to Ben's tree. Ben, please let me know what I have done wrong in terms of integration to your tree, as the main purpose of

Latest patches for GK20A, taking comments received for v3 into account. Changes since v3: - use only pfn_to_page() and page_to_pfn() in GK20A's FB. These functions are present on every arch and the physical address to page frame number conversion is also consistently a shift of PAGE_SHIFT. This part will probably be replaced by something nicer in the future anyway. - fixed a warning on

Hi everyone, Way overdue v2 of the final patches that enable basic GK20A support. Hopefully all the issues raised with v1 have been addressed. Changes since v1: - Use gk20a clock driver by Ben instead of twiddling nv04's - Name new classes after gk20a instead of nvea - Addressed comments about BAR initialization code factorization - Removed non-essential code which only purpose was to avoid

Second version of this patchset. Not many changes since first version - I hope this means the changes are not too controversial. Changes since v1: - Removed lookup for previous FW files in "nouveau/" - Went back to using request_firmware() since we only try to load one file Original cover letter follows: GM20B is the GPU of the upcoming Tegra X1 SoC. This series adds initial support

Hello everyone, GM20B is the GPU of the upcoming Tegra X1 SoC. This series adds initial support for it, based on a rework of the already-supported GK20A. It also introduces support for NVIDIA-provided firmware files, which is why I have added a few NVIDIA people who are relevant to this discussion. The first patch adds support for loading the FECS and GPCCS firmwares from firmware files

Changes since v2: - Enabled software class - Removed unneeded changes to nouveau_accel_init() - Replaced use of architecture-private pfn_to_dma() and dma_to_pfn() with the portable page_to_phys()/phys_to_page() - Fixed incorrect comment/commit log talking about bytes instead of words Hope this looks good! Once this gets merged the next set will be to use this driver on Jetson and Venice2

Hi everyone, Here is the second batch of patches to add GK20A support to Nouveau. This time we are adding the actual chip support, and this series brings the driver to a point where a slightly-tweaked Mesa successfully runs shaders and renders triangles on GBM! Many thanks to Thierry Reding and the people on the #nouveau IRC channel for their help without which we would not have reached this